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review.coreboot.org / coreboot / f1b58b78351d7ed220673e688a2f7bc9e96da4e2 / src / southbridge / intel / i82801ix / bootblock.c
  1. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  2. 4513020 cpu/intel: Use the common code to initialize the romstage timestamps by Arthur Heymans · 6 years ago
  3. f1c8ede sb/intel/i82801ix: fetch initial timestamp in bootblock by Arthur Heymans · 7 years ago
  4. ba28e8d src/southbridge: Code formating by Elyes HAOUAS · 8 years ago
  5. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  6. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  7. 9a817ef soutbridge/*/bootblock: Use pci_dev_t over device_t typedef by Edward O'Callaghan · 10 years ago
  8. 264d265 southbridge: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  9. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  10. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  11. e72a8a3 intel/i82801ix: new southbridge, ICH9 by Patrick Georgi · 12 years ago