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review.coreboot.org / coreboot / f1b58b78351d7ed220673e688a2f7bc9e96da4e2 / src / northbridge / intel / gm45 / ram_calc.c
  1. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  2. 009518e nb/intel/gm45: Correctly cache TSEG by Arthur Heymans · 6 years ago
  3. 64f6b71 src/northbridge: Fix typo by Elyes HAOUAS · 6 years ago
  4. aade90e nb/intel/gm45: Use common code for SMM in TSEG by Arthur Heymans · 7 years ago
  5. 3a4edb6 nb/intel/gm45: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  6. 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  7. 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
  8. 8b76605 nb/intel/gm45: Allocate a 8M TSEG region by Arthur Heymans · 7 years ago
  9. 823020d intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup by Kyösti Mälkki · 8 years ago
  10. 811932a intel i945 gm45 x4x: Apply cbmem_top() alignment by Kyösti Mälkki · 8 years ago
  11. eeaf9e4 nb/gm45: Refactor IGD vram decoding by Arthur Heymans · 8 years ago
  12. a4ffe9d intel post-car: Separate files for setup_stack_and_mtrrs() by Kyösti Mälkki · 8 years ago
  13. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  14. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  15. f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  16. efd1c6b gm45: Recognize 48MiB gfx UMA. by Vladimir Serbinenko · 10 years ago
  17. dcb688e CBMEM: Unify get_top_of_ram() by Kyösti Mälkki · 11 years ago
  18. 3f9a62e Add pci_devfn_t and use with __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
  19. ef84401 Add directive __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
  20. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  21. 2efc880 intel/gm45: new northbridge by Patrick Georgi · 12 years ago