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review.coreboot.org / coreboot / f091f4daf7e76cff3cdf9b7a19bb77281fb6af9d / src / northbridge / intel / x4x
  1. f091f4d intel/smm/gen1: Rename header file by Kyösti Mälkki · 5 years ago
  2. 544878b arch/x86: Add postcar_frame_common_mtrrs() by Kyösti Mälkki · 5 years ago
  3. 5bc641a cpu/intel: Refactor platform_enter_postcar() by Kyösti Mälkki · 5 years ago
  4. b3267e0 cpu/intel: Replace bsp_init_and_start_aps() by Kyösti Mälkki · 5 years ago
  5. 0f5e01a arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION by Kyösti Mälkki · 5 years ago
  6. 9fc12e0 arch/x86: Enable POSTCAR_CONSOLE by default by Kyösti Mälkki · 5 years ago
  7. 0a4457f lib/stage_cache: Refactor Kconfig options by Kyösti Mälkki · 5 years ago
  8. fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago
  9. bccd2b6 intel/i945,gm45,pineview,x4x: Fix stage cache location by Kyösti Mälkki · 5 years ago
  10. aba8fb1 intel/i945,gm45,pineview,x4x: Move stage cache support function by Kyösti Mälkki · 5 years ago
  11. 5033d6c nb/intel/x4x: Die on invalid memory speeds by Jacob Garber · 5 years ago
  12. 8abf66e cpu/x86: Flip SMM_TSEG default by Kyösti Mälkki · 5 years ago
  13. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  14. e951e8e nb/x4x: Rename {ddr,fsb}2{mhz,ps} as {ddr,fsb}_to_{mhz,ps} by Elyes HAOUAS · 5 years ago
  15. c53665c nb/intel/x4x: Remove variable set but not used by Elyes HAOUAS · 5 years ago
  16. 2dbc095 nb/intel/x4x/rcven.c: Remove variable set but not used by Elyes HAOUAS · 5 years ago
  17. 51401c3 src/northbridge: Add missing 'include <types.h>' by Elyes HAOUAS · 5 years ago
  18. 502008d nb/northbridge/intel/x4x/acpi.c: Remove variable set but not used by Elyes HAOUAS · 5 years ago
  19. 0c89c1c nb/intel/x4x/early_init.c: Remove variable set but not used by Elyes HAOUAS · 5 years ago
  20. 274dabd src/northbridge: Remove unneeded include <arch/io.h> by Elyes HAOUAS · 5 years ago
  21. 1bc7b6e {gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function by Elyes HAOUAS · 5 years ago
  22. b559b3c nb/x4x: Use system_reset() and full_reset() by Elyes HAOUAS · 5 years ago
  23. 0f49dd2 src/northbridge/intel: Remove unused variables by Elyes HAOUAS · 5 years ago
  24. f74f6cb nb/intel/{gm45,i945,x4x}: Correct array bounds checks by Jacob Garber · 5 years ago
  25. bf0970e src: Use include <delay.h> when appropriate by Elyes HAOUAS · 5 years ago
  26. f5cf60f Move calls to quick_ram_check() before CBMEM init by Kyösti Mälkki · 5 years ago
  27. 4a0f071 {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() by Subrata Banik · 5 years ago
  28. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  29. 74aa99a src: Drop unused '#include <halt.h>' by Elyes HAOUAS · 5 years ago
  30. e183429 nb/intel/stage_cache.c: Drop unnecessary includes by Elyes HAOUAS · 5 years ago
  31. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  32. 503d324 Remove DEFAULT_PCIEXBAR alias by Kyösti Mälkki · 5 years ago
  33. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  34. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  35. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  36. c01a505 sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read() by Kyösti Mälkki · 6 years ago
  37. a402a9e nb/intel/x4x: Put stage cache in TSEG by Arthur Heymans · 6 years ago
  38. c82950b nb/intel/x4x: Use parallel MP init by Arthur Heymans · 6 years ago
  39. 15b83da nb/intel/x4x: Remove spurious pcidev_on_root() usage by Nico Huber · 6 years ago
  40. f5a57a8 mb: Move timestamp_add_now to northbridge x4x by Elyes HAOUAS · 6 years ago
  41. c70eed1 device: Use pcidev_on_root() by Kyösti Mälkki · 6 years ago
  42. 98a9174 device: Replace ugly cases of dev_find_slot() by Kyösti Mälkki · 6 years ago
  43. 1f4cb32 northbridge: Remove useless include <device/pci_ids.h> by Elyes HAOUAS · 6 years ago
  44. 586f24d northbridge: Remove unneeded include <pc80/mc146818rtc.h> by Elyes HAOUAS · 6 years ago
  45. 4c65bfc nb/intel/x4x: Use common code for SMM in TSEG by Arthur Heymans · 6 years ago
  46. 0ce41f1 src: Add required space after "switch" by Elyes HAOUAS · 6 years ago
  47. 8a5283a src: Remove unneeded include <cbmem.h> by Elyes HAOUAS · 6 years ago
  48. f765d4f src: Remove unneeded include <lib.h> by Elyes HAOUAS · 6 years ago
  49. ead574e src: Get rid of duplicated includes by Elyes HAOUAS · 6 years ago
  50. d2b9ec1 src: Remove unneeded include "{arch,cpu}/cpu.h" by Elyes HAOUAS · 6 years ago
  51. 0f14df4 nb/intel/x4x/raminit: Add missing space by Jonathan Neuschäfer · 6 years ago
  52. d522db0 nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardware by Arthur Heymans · 6 years ago
  53. 17ad459 nb/intel/*: Account for cbmem_top alignment by Arthur Heymans · 6 years ago
  54. a342f39 src: Remove unneeded whitespace by Elyes HAOUAS · 6 years ago
  55. b1ba662 nb/intel/x4x: Fix P45 CAPID max frequency by Arthur Heymans · 6 years ago
  56. 8ddd7d1 nb/intel/x4x: Program read training results to all ranks by Arthur Heymans · 6 years ago
  57. 88607a4 src: Use tabs for indentation by Elyes HAOUAS · 6 years ago
  58. b0c6cff nb/intel/x4x: Don't use cached settings if CPU FSB has been changed by Arthur Heymans · 6 years ago
  59. 3e3bae0 nb/intel/x4x/gma.c: fix skipping of native graphics init by Stefan Tauner · 6 years ago
  60. e6c8f7e nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled by Arthur Heymans · 6 years ago
  61. 3d45000 src: Fix typo by Elyes HAOUAS · 6 years ago
  62. 64f6b71 src/northbridge: Fix typo by Elyes HAOUAS · 6 years ago
  63. 3a2f900 x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [2/2] by Felix Held · 6 years ago
  64. c6e13b6 nb/intel/x4x: Don't use PCI operations on the pci_domain device by Arthur Heymans · 6 years ago
  65. 432575c x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2] by Felix Held · 6 years ago
  66. 6cd2c2f northbridge/x4x: add MCHBAR AND/OR/AND_OR access macros by Felix Held · 6 years ago
  67. a8a9f34 sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables by Arthur Heymans · 7 years ago
  68. df946b8 nb/intel/x4x: Issue a hard reset with empty MRC cache on warm reset by Arthur Heymans · 6 years ago
  69. e809305 nb/intel/x4x: Deprecate native graphic init by Arthur Heymans · 6 years ago
  70. 7345a17 nb/intel/x4x: Fix a few things in set_enhanced_mode by Arthur Heymans · 6 years ago
  71. 5a9dbde nb/intel/x4x: Work around a quirk by Arthur Heymans · 6 years ago
  72. 0602ce6 nb/intel/x4x: Add the option for stacked channel map settings by Arthur Heymans · 6 years ago
  73. f2dd049 libgfxinit: Enable G45 support (for GM45/X4X) by Nico Huber · 7 years ago
  74. 730df3c arch/x86: Make RELOCATABLE_RAMSTAGE the default by Kyösti Mälkki · 8 years ago
  75. 4ff675e nb/intel/x4x: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  76. 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  77. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  78. 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
  79. 0d28495 nb/intel/x4x: Adapt post JEDEC for DDR3 by Arthur Heymans · 7 years ago
  80. 3fa103a nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings by Arthur Heymans · 7 years ago
  81. b4a7804 nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings by Arthur Heymans · 7 years ago
  82. b5170c3 nb/intel/x4x: Implement write leveling by Arthur Heymans · 7 years ago
  83. f128726 nb/intel/x4x: Add DDR3 JEDEC init by Arthur Heymans · 7 years ago
  84. e6cc21e nb/intel/x4x/raminit: DDR3 specific ODT by Arthur Heymans · 7 years ago
  85. 0d1c9b0 nb/intel/x4x: Add DDR3 rcomp by Arthur Heymans · 7 years ago
  86. 638240e nb/intel/x4x/raminit: Support programming initials DD3 DLL setting by Arthur Heymans · 7 years ago
  87. 66a0f55 nb/intel/x4x/raminit: Support programming DDR3 timings by Arthur Heymans · 7 years ago
  88. 7a3a319 nb/intel/x4x/raminit: Make programming launch ddr3 specific by Arthur Heymans · 7 years ago
  89. 840c27e nb/intel/x4x/raminit: Make programming crossclock support DDR3 by Arthur Heymans · 7 years ago
  90. a2cc231 nb/intel/x4x: Rename a things that are not specific to DDR2 by Arthur Heymans · 7 years ago
  91. 1848ba3 nb/x4x/raminit: Decode ddr3 dimms by Arthur Heymans · 7 years ago
  92. 701da39 nb/intel/x4x/raminit: Fix programming dual channel registers by Arthur Heymans · 7 years ago
  93. 3de3031 {mb,nb,soc}: Remove references to pci_bus_default_ops() by Nico Huber · 6 years ago
  94. 16a70a4 nb/intel/x4x: Change memory layout to improve MTRR by Arthur Heymans · 7 years ago
  95. dfce932 nb/intel/x4x: Fix programming CxDRB by Arthur Heymans · 7 years ago
  96. 95c48cb nb/intel/x4x: Implement both read and write training by Arthur Heymans · 7 years ago
  97. fea02e1 nb/x4x: Get rid of device_t by Elyes HAOUAS · 7 years ago
  98. d4e5762 nb/intel/x4x: Fix computing page_size by Arthur Heymans · 7 years ago
  99. a4e8f67b nb/intel/x4x/rcven.c: Change the verbosity of some messages by Arthur Heymans · 7 years ago
  100. 276049f nb/intel/x4x: Add a convenient macro to loop over bytelanes by Arthur Heymans · 7 years ago