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review.coreboot.org / coreboot / f0174b5a9c976401797d241c61b4fdf0f425cc6f / src / cpu / amd / model_10xxx
  1. f0174b5 Find matching settings for each CPUs FID, VID, and P-state registers and initialize them. by Marc Jones · 16 years ago
  2. 8127dc4 Update the FAM10 microcode to current versions. by Marc Jones · 16 years ago
  3. c74e362 Missed this file in the previous check-in, r3248. by Marc Jones · 16 years ago
  4. da4ce6b Add early MSR and PCI register initialization. by Marc Jones · 16 years ago
  5. 78f59f8 Re-add files I deleted by mistake in r3219. They are meant for a different by Marc Jones (marc.jones · 16 years ago
  6. df22f78 Don't check exclusive IRQ fieldin the PIR table. by Marc Jones(marc.jones · 16 years ago
  7. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 17 years ago
  8. 8ae8c88 Initial AMD Barcelona support for rev Bx. by Marc Jones · 17 years ago