- 885e8cb sb/intel/bd82x6x: Honor POST code Kconfig option by Keith Hui · 9 months ago
- c9ee2c0 sb/intel/bd82x6x: Use common early SPI code by Angel Pons · 4 years, 2 months ago
- c803f65 sb/intel/bd82x6x: Use PCI bitwise ops by Angel Pons · 4 years, 2 months ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
- 182dbde src/southbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
- f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
- de64078 bootblock: Provide some common prototypes by Kyösti Mälkki · 4 years, 9 months ago
- 360d947 nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK by Arthur Heymans · 4 years, 9 months ago
- 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
- f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
- 4513020 cpu/intel: Use the common code to initialize the romstage timestamps by Arthur Heymans · 6 years ago
- 58a8953 Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" by Arthur Heymans · 6 years ago
- d2d2aef sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location by Arthur Heymans · 7 years ago
- 1d64e26 sb/intel/bd82x6x/bootblock: Use register name by Patrick Rudolph · 7 years ago
- a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
- 06f1f8f timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS by Aaron Durbin · 10 years ago
- b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
- bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
- 9a817ef soutbridge/*/bootblock: Use pci_dev_t over device_t typedef by Edward O'Callaghan · 10 years ago
- 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
- a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
- 2a700ec SPI: Configure Software Sequence SPI Freq to match descriptor by Duncan Laurie · 12 years ago
- 8e515d3 RTC: Enable extended CMOS in the bootblock by Duncan Laurie · 12 years ago
- 80529ab Cougar Point southbridge: Add includes and drop post_code() by Stefan Reinauer · 12 years ago
- 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago