- edf71a0 soc/intel/alderlake: Skip PCIe source clock assignment if incorrect by Cliff Huang · 2 years, 4 months ago
- a182fae soc/intel/alderlake: Hook up FSP hyper-threading setting to option API by Felix Singer · 2 years, 8 months ago
- ab638c1 soc/intel/adl/chip.h: Rename max_dram_speed to include units by Scott Chao · 2 years, 4 months ago
- 88381c9 soc/intel/adl: Disable FSP debug output if !FSP_ENABLE_SERIAL_DEBUG by Subrata Banik · 2 years, 5 months ago
- 9e78dd1 soc/intel/alderlake: Update CPU IDs with correct steppings by Lean Sheng Tan · 2 years, 5 months ago
- 7cb6d72 soc/intel/alderlake: Use coreboot native event handler for FSP-M/S by Subrata Banik · 2 years, 5 months ago
- 215a97e soc/intel/adl/chip.h: Convert all camel case variables to snake case by MAULIK V VAGHELA · 2 years, 6 months ago
- 6f73a20 drivers/wifi,soc/intel/adl: Move CnviDdrRfim property to drivers by Tim Wawrzynczak · 2 years, 7 months ago
- 09f3b6c mb, soc: change mainboard_memory_init_params prototype by Zhuohao Lee · 2 years, 7 months ago
- 02967e6 soc/intel/alderlake: Fix function pointer type by Arthur Heymans · 2 years, 6 months ago
- dfde9b1 Revert "soc/intel/adl: Skip sending MBP HOB to save boot time" by MAULIK V VAGHELA · 2 years, 7 months ago
- e966595 treewide: Remove "ERROR: "/"WARN: " prefixes from log messages by Julius Werner · 2 years, 7 months ago
- ff553ba soc/intel/alderlake: Check clkreq overlap by Kane Chen · 2 years, 8 months ago
- b4a169a soc/intel/alderlake: Add option to make MRC log silent by Subrata Banik · 2 years, 8 months ago
- 461ff1d soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.h by Tim Wawrzynczak · 2 years, 9 months ago
- fc69b9d soc/intel/alderlake: Add the CnviDdrRfim configuration by Ronak Kanabar · 2 years, 11 months ago
- 3b03798 soc/intel/alderlake: Disable VT-d for early silicons by Meera Ravindranath · 2 years, 9 months ago
- 9a7fbbc soc/intel/adl: Skip sending MBP HOB to save boot time by MAULIK V VAGHELA · 2 years, 10 months ago
- 8fcefd3 soc/intel/alderlake: add MaxDramSpeed config by Casper Chang · 2 years, 11 months ago
- 87685c5 soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h' by Subrata Banik · 3 years, 1 month ago
- 7b8d11b soc/intel/alderlake: Use `is_devfn_enabled()` for Crashlog UPDs by Subrata Banik · 3 years, 1 month ago
- 0007fa9 soc/intel/alderlake: Update mainboard_memory_init_params() argument by Subrata Banik · 3 years, 2 months ago
- 85c9dda soc/intel/alderlake/romstage: Refactor soc_memory_init_params function by Subrata Banik · 3 years, 2 months ago
- 8a18bd8 soc/intel/alderlake/romstage: Update display UPDs based on InternalGfx by Subrata Banik · 3 years, 2 months ago
- 50134ec soc/intel/alderlake: Make use of is_devfn_enabled() function by Subrata Banik · 3 years, 2 months ago
- 930b643 soc/intel/alderlake/romstage: Drop ineffective FSP-M UPD `ChHashMask` by Subrata Banik · 3 years, 2 months ago
- 24b1c54 soc/intel/alderlake: Set SaIpuEnable UPD according to devicetree by Tim Wawrzynczak · 3 years, 3 months ago
- d047927 soc/intel/alderlake: Set Base Addresses for TBT DMA remapping engines by Sridhar Siricilla · 3 years, 3 months ago
- cea4f92 soc/intel/alderlake: Add CrashLog implementation for Intel ADL by Francois Toguo · 3 years, 4 months ago
- a3f7deb soc/intel/alderlake: Fill FSPM UPDs for VT-d configuration by Meera Ravindranath · 3 years, 5 months ago
- 50f8b4e soc/intel/alderlake: Add enum for HDA audio configuration by Sugnan Prabhu S · 3 years, 5 months ago
- c1c1ba5 soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.h by Furquan Shaikh · 3 years, 4 months ago
- 5b302b2 soc/intel/alderlake: Refactor PCIE port config by Eric Lai · 3 years, 9 months ago
- d74cd60 soc/intel/alderlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGD by Subrata Banik · 3 years, 7 months ago
- 85144d9 soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs by Subrata Banik · 3 years, 7 months ago
- 407488e src/soc/intel/alderlake: Enable the PCH HDA by V Sowmya · 3 years, 9 months ago
- 28371e2 soc/intel/alderlake/romstage: Skip GPIO configuration from FSP by Subrata Banik · 3 years, 10 months ago
- 0aed4e5 soc/intel/alderlake: Enable TME for Alder Lake by Subrata Banik · 3 years, 10 months ago
- 2871e0e soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage by Subrata Banik · 3 years, 11 months ago
- 80835a1 soc/intel/alderlake/romstage: Fix compilation issue by Subrata Banik · 4 years ago
- 292afef soc/intel/alderlake/romstage: Do initial SoC commit till romstage by Subrata Banik · 4 years ago