- 588c6f0 cpu/intel/model_206ax: Use haswell cstate_map by Patrick Rudolph · 11 months ago
- ad65e8c cpu: Include <cpu/cpu.h> instead of <arch/cpu.h> by Elyes Haouas · 1 year, 10 months ago
- 7e3126d cpu/intel/model_206ax: Add more CPU steppings by Angel Pons · 3 years, 8 months ago
- 47a80a0 nb/intel/sandybridge: Move steppings to CPU header by Angel Pons · 3 years, 8 months ago
- 964d91f nb/intel/sandybridge: Clean up stepping logic by Angel Pons · 3 years, 8 months ago
- 10ae1cf {cpu,soc}/intel: deduplicate cpu code by Michael Niewöhner · 3 years, 10 months ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
- f23ae0b src/cpu: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
- 82c0e7e arch/x86: Drop some __SMM__ guards by Kyösti Mälkki · 4 years, 10 months ago
- 838d8b0 AUTHORS: Move src/cpu/intel copyrights into AUTHORS file by Martin Roth · 5 years ago
- f6c2068 intel/nehalem,sandybridge: Move stage_cache support function by Kyösti Mälkki · 5 years ago
- a6a396d cpu/intel/{haswell,model_206{5,a}x}: Use MSR_CORE_THREAD_COUNT for msr at 0x35 by Elyes HAOUAS · 5 years ago
- edbf5d9 cpu/intel/model_206ax: Use parallel MP init by Arthur Heymans · 7 years ago
- dfbe6bd src: Add missing include <stdint.h> by Elyes HAOUAS · 6 years ago
- 419bfbc src: Move common IA-32 MSRs to <cpu/x86/msr.h> by Elyes HAOUAS · 6 years ago
- dfaff4d cpu/intel/model_206ax: detect number of MCE banks by Dan Elkouby · 6 years ago
- 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
- 68f6888 Revert "model_206ax: Use parallel MP init" by Arthur Heymans · 6 years ago
- 5fbe788 model_206ax: Use parallel MP init by Arthur Heymans · 7 years ago
- 67031a5 cpu/intel/sandybridge: Put stage cache into TSEG by Arthur Heymans · 7 years ago
- 7b5f12b9 cpu/intel: Indent with tabs by Lee Leahy · 7 years ago
- a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
- a3e41c0 Migrate 206ax to SMM_MODULES by Vladimir Serbinenko · 9 years ago
- b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
- 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
- 644e83b speedstep: Deduplicate some MSR identifiers by Patrick Georgi · 12 years ago
- 5563211 CPU: Add option to set TCC activation offset by Duncan Laurie · 12 years ago
- c0f2cfb Fix comment to reference IvyBridge, too by Stefan Reinauer · 12 years ago
- 22935e1 CPU: Set flex ratio to nominal TDP ratio in bootblock by Duncan Laurie · 12 years ago
- 4e4320f CPU: Update ivybridge PP1 current limit value by Duncan Laurie · 12 years ago
- 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 12 years ago
- 5c55463 Add support for Intel Sandybridge CPU by Stefan Reinauer · 12 years ago