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review.coreboot.org / coreboot / e9665959edeba6ae2d5364c4f7339704b6b6fd42 / src / soc / intel / common / block / pcie
  1. e966595 treewide: Remove "ERROR: "/"WARN: " prefixes from log messages by Julius Werner · 2 years, 7 months ago
  2. d1a7416 soc/intel/common/block/pcie/rtd3: Add optional _OFF and _ON skip control by Cliff Huang · 2 years, 7 months ago
  3. 4bc9ac7 soc/intel/common/block/pcie/rtd3: Add PM methods to the device. by Cliff Huang · 2 years, 7 months ago
  4. 948ed24 intel/common/block/pcie: Add NULL/count check in pcie_rp_update_devtree by MAULIK V VAGHELA · 2 years, 7 months ago
  5. 8f2df28 soc/intel/common: Include Alder Lake-N device IDs by Usha P · 2 years, 7 months ago
  6. b3cd55b soc/intel/common/block/pcie/rtd3: Fix PMC IPC method for CPU PCIe RP by Tim Wawrzynczak · 2 years, 7 months ago
  7. b6a15a7 soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs by Tim Wawrzynczak · 2 years, 8 months ago
  8. 32f883e soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3 by Tim Wawrzynczak · 2 years, 9 months ago
  9. 4eb17f8 soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs by Tracy Wu · 2 years, 9 months ago
  10. 191a8d7 soc/intel/common: Add TGL-H PCI IDs by Jeremy Soller · 3 years ago
  11. 6108321 soc/intel/common/pcie/rtd3: Update _S0W to use symbol instead of 4 by Tim Wawrzynczak · 3 years ago
  12. f530e36 soc/intel: Rename 200-series PCH device IDs by Angel Pons · 3 years, 4 months ago
  13. a979460 soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC by Rizwan Qureshi · 3 years, 4 months ago
  14. 61fcb7e acpi/acpigen.h: Add more intuitive AML package closing functions by Jakub Czapiga · 3 years, 6 months ago
  15. 968ef75 pciexp_device: Rewrite LTR configuration by Nico Huber · 3 years, 5 months ago
  16. a768dea device: Give `pci_ops.set_L1_ss_latency` a proper name by Nico Huber · 3 years, 5 months ago
  17. f4d98fdd2 soc/intel/commmon: Include Alder Lake device IDs by Varshit Pandya · 3 years, 7 months ago
  18. ea3e6b06cc soc/intel/common/pcie: Allow pcie_rp_group table to be non-contiguous by Furquan Shaikh · 3 years, 7 months ago
  19. d64d426 soc/intel/common/pcie: Add helper function for getting mask of enabled ports by Furquan Shaikh · 3 years, 8 months ago
  20. 64bc26a soc/intel/common: Add PCIe Runtime D3 driver for ACPI by Duncan Laurie · 3 years, 10 months ago
  21. f672f7f soc/intel/common: Include Alder Lake device IDs by Subrata Banik · 4 years ago
  22. b82b431 src: Never set ISA Enable on PCI bridges by Angel Pons · 4 years, 1 month ago
  23. 18d3159 soc/intel/common/block/pcie: Select ASPM on mainboard basis by Christian Walter · 4 years, 1 month ago
  24. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  25. 0612b27 soc/intel/common: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 4 months ago
  26. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  27. 3f4af0d soc/intel/common: Update Jasper Lake Device IDs by Meera Ravindranath · 4 years, 6 months ago
  28. 2613609 soc/intel/common: Add Elkhartlake Device IDs by Tan, Lean Sheng · 4 years, 7 months ago
  29. 12a651c soc/intel/common: Add PCI device IDs for CMP-H by Gaggery Tsai · 4 years, 9 months ago
  30. 263f129 soc/intel/common: Add Jasperlake Device IDs by rkanabar · 4 years, 9 months ago
  31. 5e8afce soc/intel: Implement PCIe RP devicetree update based on LCAP by Nico Huber · 4 years, 10 months ago
  32. 6b5bf40 soc/intel/common: Include Tigerlake device IDs by Ravi Sarawadi · 4 years, 10 months ago
  33. df128a5 intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL by Kyösti Mälkki · 5 years ago
  34. 571d07d soc/intel/skylake: Add Lewisburg family PCH support by Maxim Polyakov · 5 years ago
  35. ed6996f device/pciexp_device: Convert LTR non-snoop/snoop value into common macro by Subrata Banik · 5 years ago
  36. 15ccbf0 {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem() by Subrata Banik · 5 years ago
  37. b1434fc Fix 'unsigned int' to bare use of 'unsigned' by Subrata Banik · 5 years ago
  38. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  39. da7ffb48 soc/intel/common: Include cometlake PCH IDs by Ronak Kanabar · 6 years ago
  40. 87ca389 soc/intel/{common, skylake}: Make ASPM enabling as common PCH feature by Subrata Banik · 6 years ago
  41. 9eac039 soc/intel/common: Include Icelake device IDs by Aamir Bohra · 6 years ago
  42. e26c4a4 soc/intel/cannonlake: Add new cannon lake PCH-H support by praveen hodagatta pranesh · 6 years ago
  43. 4a13126 soc/intel/common/block: Don't use device_t in ramstage by Elyes HAOUAS · 6 years ago
  44. e56189c pci: Move inline PCI functions to pci_ops.h by Patrick Rudolph · 6 years ago
  45. 6bbc91a soc/intel/common/block: Add option to have subsystem_id in common pci driver by Subrata Banik · 7 years ago
  46. bbedef9 soc/intel/common: Add Cannonlake pci ids for common by Lijian Zhao · 7 years ago
  47. 2d689f9 soc/intel/common: Add Intel PCIe common code by Aamir Bohra · 7 years ago