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review.coreboot.org / coreboot / e9665959edeba6ae2d5364c4f7339704b6b6fd42 / src / cpu / x86 / mtrr
  1. e966595 treewide: Remove "ERROR: "/"WARN: " prefixes from log messages by Julius Werner · 2 years, 7 months ago
  2. 6fcc46d cpu/x86/mtrr: Use a Kconfig for reserving MTRRs for OS by Tim Wawrzynczak · 3 years, 4 months ago
  3. 2e97394 program_loading: Replace prog_rdev() with raw start pointer and size by Julius Werner · 4 years ago
  4. 07f11db cpu/x86/mtrr/earlymtrr.c: Remove repeated word by Elyes HAOUAS · 3 years, 7 months ago
  5. 8f594b7 cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN by Jonathan Zhang · 3 years, 10 months ago
  6. 320ad93 cpu/x86/mtrr: add support for address space higher than 16TiB by Jonathan Zhang · 3 years, 10 months ago
  7. cfc170b src/*: Update makefiles to exclude x86 code from psp-verstage by Martin Roth · 4 years, 2 months ago
  8. eadd251 cpu/x86: Define MTRR_CAP_PRMRR by Kyösti Mälkki · 4 years, 2 months ago
  9. 1ebbb16 cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb() by Aaron Durbin · 4 years, 3 months ago
  10. fa5eded cpu/x86/mtrr: add helper for setting multiple MTRRs by Aaron Durbin · 4 years, 3 months ago
  11. 32da343 src: Remove unused '#include <cpu/x86/lapic.h>' by Elyes HAOUAS · 4 years, 3 months ago
  12. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  13. 3a7346c cpu/x86/mtrr: Replace GPLv2 long form headers with SPDX header by Elyes HAOUAS · 4 years, 3 months ago
  14. 02363b5 treewide: Move "is part of the coreboot project" line in its own comment by Patrick Georgi · 4 years, 3 months ago
  15. 3e42ee0 cpu/x86/mtrr/earlymtrr: Validate MTRR arguments by Raul E Rangel · 4 years, 4 months ago
  16. 2d7173d src: Remove unused 'include <cpu/x86/cache.h>' by Elyes HAOUAS · 4 years, 4 months ago
  17. 3ae3ff2 src/cpu/x86/mtrr/earlymtrr: Add clear_all_var_mtrr by Raul E Rangel · 4 years, 4 months ago
  18. f23ae0b src/cpu: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  19. bda8702 cpu/x86/mtrr/xip_cache.c: Fix inconsistent message by Angel Pons · 4 years, 10 months ago
  20. 47be2d9 cpu/x86: Add a prog_run hook to set up caching of XIP stages by Arthur Heymans · 4 years, 10 months ago
  21. 44da9e2 cpu,device/: Remove some __SIMPLE_DEVICE__ and __ROMCC__ use by Kyösti Mälkki · 4 years, 11 months ago
  22. d57ace2 AUTHORS: Move src/cpu copyrights into AUTHORS file by Martin Roth · 5 years ago
  23. 6c8a040 cpu/x86/mtrr: Replace CONFIG_CPU_ADDR_BITS with cpu_phys_address_size() by Subrata Banik · 5 years ago
  24. 361f6ff src/cpu: Use 'include <stdlib.h>' when appropriate by Elyes HAOUAS · 5 years ago
  25. d26844c cpu: Add missing #include <commonlib/helpers.h> by Elyes HAOUAS · 5 years ago
  26. 5b92272 cpu/x86/mtrr: Assert that MSR arrays are fully initialized by Jacob Garber · 5 years ago
  27. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  28. 89989cf src: Drop unused include <arch/acpi.h> by Elyes HAOUAS · 5 years ago
  29. b28025a cpu/x86/mtrr/mtrr.c:Avoid static scan false positive by Richard Spiegel · 5 years ago
  30. d67edca soc/intel/common: Bring DISPLAY_MTRRS into the light by Nico Huber · 6 years ago
  31. d2b9ec1 src: Remove unneeded include "{arch,cpu}/cpu.h" by Elyes HAOUAS · 6 years ago
  32. bb3a5ef Correct "MTTR" to "MTRR" by Jonathan Neuschäfer · 6 years ago
  33. 2e744e0 cpu/x86/mtrr: Fix broken output ("indexis") by Jonathan Neuschäfer · 6 years ago
  34. 64f0bcb cpu/x86/mtrr: Use single code path with/without holes by Nico Huber · 7 years ago
  35. bd5fb66 cpu/x86/mtrr: Optimize hole carving strategy by Nico Huber · 7 years ago
  36. c0dbeda x86/mtrr: Enable Rd/WrDram mod in AMD fixed MTRRs by Marshall Dawson · 7 years ago
  37. ceb5271 cpu/x86/mtrr: Remove var-MTRR alignment optimization by Nico Huber · 7 years ago
  38. 0fa92b3 src/cpu: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  39. d9762f7 cpu/x86/mtrr: fail early if solution exceeds available MTRRs by Aaron Durbin · 7 years ago
  40. c591707 cpu/x86: Wrap lines at 80 columns by Lee Leahy · 7 years ago
  41. 8ca9a21 cpu/x86: Add int to unsigned by Lee Leahy · 7 years ago
  42. a07d0dd cpu/x86: Use tabs for indent by Lee Leahy · 7 years ago
  43. 6add44b src/cpu/x86: Update/Add license headers to all files by Martin Roth · 8 years ago
  44. 2bebd7b cpu/x86/mtrr: allow temporary MTRR range during coreboot by Aaron Durbin · 8 years ago
  45. 8453c4f cpu/x86: Move fls() and fms() to mtrr.h by Rizwan Qureshi · 8 years ago
  46. a38677b cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundary by Aaron Durbin · 8 years ago
  47. 0c85b7f soc/intel/apollolake: Add cache for BIOS ROM by Andrey Petrov · 8 years ago
  48. 331ac1b mtrr: Define a function for obtaining free var mtrr by Furquan Shaikh · 8 years ago
  49. b4e5c5eb cpu/x86: compile earlymtrr.c code for romstage as well by Andrey Petrov · 8 years ago
  50. 5fa5da1 cpu/x86/mtrr: remove early_mtrr_* functions by Aaron Durbin · 8 years ago
  51. 264bf0b cpu/x86/mtrr: move cache_ramstage() to its only user by Aaron Durbin · 8 years ago
  52. e63be89 cpu/x86/mtrr: add helper function to detect variable MTRRs by Aaron Durbin · 8 years ago
  53. 2f91403 src: Fix various spelling and whitespace issues. by Martin Roth · 9 years ago
  54. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  55. 6a70dbc cpu/x86/mtrr: Add MTRR index and total MTRRs to error message by Paul Menzel · 9 years ago
  56. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  57. 46cf9f7 Verify Kconfigs symbols are not zero for hex and int type symbols by Martin Roth · 9 years ago
  58. c4e49f6 Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() by Martin Roth · 9 years ago
  59. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  60. 81f90c5 x86/mtrr: Enable MTRR's before enabling caching by Isaac Christensen · 10 years ago
  61. 7756fe7 x86: Minimize work done with the caches disabled in mtrr functions. by Gabe Black · 10 years ago
  62. 38a8fb0 x86 MTRR: Drop unused return value by Kyösti Mälkki · 10 years ago
  63. 599cda8 Use MTRR defines by Kyösti Mälkki · 10 years ago
  64. 4337020 Remove CACHE_ROM. by Vladimir Serbinenko · 11 years ago
  65. ca4f4b8 mtrr: only add prefetchable resources as WRCOMB for VGA devices by Aaron Durbin · 11 years ago
  66. 30fe612 MTRR: Mark all prefetchable resources as WRCOMB. by Vladimir Serbinenko · 11 years ago
  67. 5b9e3b6 mtrr: retry fitting w/o WRCOMB if usage exceeds BIOS allocation by Aaron Durbin · 11 years ago
  68. 4fe9813 src/cpu: Fix spelling of MTTR to MTRR by Paul Menzel · 11 years ago
  69. 107f72e Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR by Kyösti Mälkki · 11 years ago
  70. 88a67f0 AMD boards (non-AGESA): Cleanup earlymtrr.c includes by Kyösti Mälkki · 11 years ago
  71. 11b4780 cpu/x86/mtrr/mtrr.c: Remove superfluous assignment to `type_index` by Paul Menzel · 11 years ago
  72. 4c3ab73 cpu: Fix spelling by Martin Roth · 11 years ago
  73. bebf669 x86: use boot state callbacks to disable rom cache by Aaron Durbin · 11 years ago
  74. 190011e AMD: Drop six copies of wrmsr_amd and rdmsr_amd by Kyösti Mälkki · 11 years ago
  75. ebf142a boot: add disable_cache_rom() function by Aaron Durbin · 11 years ago
  76. 5392424 x86: mtrr: optimize hole carving above 4GiB by Aaron Durbin · 11 years ago
  77. e383442 x86: mtrr: add hole punching support by Aaron Durbin · 11 years ago
  78. bc07f5d x86: add rom cache variable MTRR index to tables by Aaron Durbin · 11 years ago
  79. 77a5b40 x86: mtrr: add CONFIG_CACHE_ROM support by Aaron Durbin · 11 years ago
  80. 9b027fe mtrr: honor IORESOURCE_WRCOMB by Aaron Durbin · 11 years ago
  81. bb4e79a x86: add new mtrr implementation by Aaron Durbin · 11 years ago
  82. 57686f8 x86: unify amd and non-amd MTRR routines by Aaron Durbin · 11 years ago
  83. 69efaa0 Google Link: Add remaining code to support native graphics by Ronald G. Minnich · 11 years ago
  84. 1ec5e74 Intel Sandybridge: add reserved memory as resources by Kyösti Mälkki · 12 years ago
  85. b91a0f2 Rename cache_lbmem() to cache_ramstage() by Stefan Reinauer · 12 years ago
  86. 0067188 MTRR: drop repetetive debug message by Stefan Reinauer · 12 years ago
  87. 2d42b34 Check for IORESOURCE_UMA_FB in MTRR setup by Kyösti Mälkki · 12 years ago
  88. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 12 years ago
  89. ffc1fb3 Drop Kconfig VAR_MTRR_HOLE option by Kyösti Mälkki · 12 years ago
  90. 7c2d058 Fix the location of "Setting variable MTRR" printk. by Denis 'GNUtoo' Carikli · 12 years ago
  91. f8f0062 Some more #if cleanup by Patrick Georgi · 12 years ago
  92. c00dfbc Cache 8MB flash instead of 4MB by Stefan Reinauer · 12 years ago
  93. 7b67892 Make MTRR min hole alignment 64MB by Duncan Laurie · 13 years ago
  94. 527fc74 Fix MB calculation in the reporting of the MTRR hole by Duncan Laurie · 13 years ago
  95. 7389fa9 MTRR: add alternate allocation method for odd memory maps by Duncan Laurie · 13 years ago
  96. 00093a8 Add an option to keep the ROM cached after romstage by Stefan Reinauer · 13 years ago
  97. adfbcb79 MTRR: get physical address size from CPUID by Sven Schnelle · 13 years ago
  98. 1da1046 Get rid of AUTO_XIP_ROM_BASE by Patrick Georgi · 13 years ago
  99. 23f49a8 earlymtrr.c: wipe some dead code, use names instead of numbers and some by Stefan Reinauer · 13 years ago
  100. 5bb9fd6 Now that the VIA code is run above 1Meg (like other boards), it should by Kevin O'Connor · 14 years ago