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review.coreboot.org / coreboot / e6c3b1d30d3fa88af6da6fcc115aa6cba3c55d1c / src / southbridge / amd
  1. ee5c111 AMD CIMx SB800: Enable AHCI mode for SATA controller by default by Paul Menzel · 11 years ago
  2. 3914a31 AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio by Jens Rottmann · 11 years ago
  3. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  4. a96d24d AMD Southbridge: Add RTC init to lpc_init by Mike Loptien · 11 years ago
  5. ac529b1 AMD/Persimmon: Add RTC init to CIMX SB800 by Mike Loptien · 11 years ago
  6. 22ec9f9 AMD S3: Introduce Kconfig variable 'S3_DATA_SIZE' by Zheng Bao · 11 years ago
  7. a8ae1c6 Whitespace: Replace tab character in license text with two spaces by Paul Menzel · 11 years ago
  8. 70c85ea build system: Retire REQUIRES_BLOB by Patrick Georgi · 11 years ago
  9. f57d0dc AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS by Zheng Bao · 11 years ago
  10. 178df11 AMD S3: Fix typo vol*a*tile in southbridge Kconfig by Zheng Bao · 11 years ago
  11. 600784e spi.h: Rename the spi.h to spi-generic.h by Zheng Bao · 11 years ago
  12. 80e3516 Hudson: Legacy free question is hudson only by Martin Roth · 12 years ago
  13. f5726ea Hudson: Cleanup - change SB800 references to hudson by Martin Roth · 12 years ago
  14. eac220f Hudson: Changes to support agesa/hudson for legacy free by Martin Roth · 12 years ago
  15. 0fbaf18 Hudson: Changes to agesa/hudson FADT for ACPI 3.0 by Martin Roth · 12 years ago
  16. 238780c Fix typo in SB800 Kconfig for IMC position by Martin Roth · 12 years ago
  17. 34746a9 rs780: Implement `rs780_internal_gfx_disable` and add .disable pcie_ops by Denis 'GNUtoo' Carikli · 12 years ago
  18. 6c6b2e8 Add AMD Hudson blobs by CONFIG_REQUIRES_BLOBS dependency by Marc Jones · 12 years ago
  19. b01097e USBDEBUG: Enable the EHCI in AMD Southbridge by Zheng Bao · 12 years ago
  20. ebb89e3 No need to contact AMD for firmware anymore by Patrick Georgi · 12 years ago
  21. bb71c91 AMD S3: Rename generated s3.rom for make clean by Zheng Bao · 12 years ago
  22. e899e51 SB800: Add IMC ROM and fan control. by Martin Roth · 12 years ago
  23. a17fd05 Rename generated hudson_romsig.bin for make clean by Martin Roth · 12 years ago
  24. 3aef7b4 Fix SPI BAR special case in lpc_set_resources by Martin Roth · 12 years ago
  25. 3316cf2 Claim the SPI bus before writes if the IMC ROM is present by Martin Roth · 12 years ago
  26. 9b92665 Drop TINY_BOOTBLOCK by Kyösti Mälkki · 12 years ago
  27. 7bcffa5 AMD S3: Leverage the public SPI routine by Zheng Bao · 12 years ago
  28. 5079a0d Remove assembly coded log2 function by Ronald G. Minnich · 12 years ago
  29. 23023a5 Enable the FCH GPP port prior to device enumeration by Dave Frodin · 12 years ago
  30. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  31. 8ada152 Unify use of bool config variables by Stefan Reinauer · 12 years ago
  32. fa66eae Get rid of hard coded strings in ACPI tables by Stefan Reinauer · 12 years ago
  33. b578627 Fix whitespace issue with help message in Kconfig file by Dave Frodin · 12 years ago
  34. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  35. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 12 years ago
  36. 8d73692 AMD Hudson: Printf the high address as unsigned integer by Zheng Bao · 12 years ago
  37. cf329ff AMD hudson: Round the float pointing number to integer by Zheng Bao · 12 years ago
  38. a7f374f cimx sb700: change Platform.h to remove some warnings by Siyuan Wang · 12 years ago
  39. fec5b64 AMD Hudson: use awk to calulate instead of expr by Zheng Bao · 12 years ago
  40. eb1d39b AMD S3: The offset of the nv storage depends on config.h by Zheng Bao · 12 years ago
  41. 71c7a3f AMD hudson: Complete the missing rule by Zheng Bao · 12 years ago
  42. 3780597 SB700/SP5100: This configures the HPET clock period. by Dave Frodin · 12 years ago
  43. cc60198 AMD Hudson: Move the combining firmware from Python to sh. by Zheng Bao · 12 years ago
  44. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  45. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago
  46. c02cada AMD RS690: mark MMCONF resource as reserved MEM by Kyösti Mälkki · 12 years ago
  47. 366f0fc AMD SB: Call the rtc update if needed (Propagation) by zbao · 12 years ago
  48. f85398c AMD S3: Remove the hardcoded volatile position by zbao · 12 years ago
  49. ef180e2 AMD hudson: Call the rtc update if needed. by zbao · 12 years ago
  50. f803ac4 AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 12 years ago
  51. efff733 Refactor driver structs by Patrick Georgi · 12 years ago
  52. b5dfcae cs5536: add smbus support in ramstage by Christian Gmeiner · 12 years ago
  53. 6db7f34 Trinity wrapper code improvement. by zbao · 12 years ago
  54. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 12 years ago
  55. 246e84b AGESA F15 wrapper for Hudson. by zbao · 12 years ago
  56. 87ed617 Fix AMD S3 block generator on Cygwin by Patrick Georgi · 12 years ago
  57. 2c08f6a AGESA F15 wrapper for Trinity by zbao · 12 years ago
  58. 9aa4389 Update SB800 CIMX FADT by Martin Roth · 12 years ago
  59. 2f00ce3 cbtypes.h: Unify cbtypes.h used in AMD board's code by Vikram Narayanan · 12 years ago
  60. ba3711c Fix fadt legacy free setting. by Marc Jones · 12 years ago
  61. 7c9ef4f Add legacy free setting and override to fadt.c by Marc Jones · 12 years ago
  62. b547c4f Merge sb800 fadt fixes from South Station mainboard to southbridge fadt. by Marc Jones · 12 years ago
  63. 923d200 Unmark source files as executables by Alec Ari · 12 years ago
  64. 76cfcbc Move fadt.c to the cimx sb800 southbridge directory to be shared. by Marc Jones · 12 years ago
  65. 7b860ed Add simple PMIO & PMIO2 read/write routines to CIMX wrapper by Martin Roth · 12 years ago
  66. f8f0062 Some more #if cleanup by Patrick Georgi · 12 years ago
  67. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  68. a20132b Do not produce temp s3.rom if the board doesn't need it. by zbao · 12 years ago
  69. e380b0f More portable s3 scratch space creation by Patrick Georgi · 12 years ago
  70. 9bcdbf8 Add Southbridge support for S3. by zbao · 12 years ago
  71. 2c2e78d Unify IO APIC address specification by Patrick Georgi · 12 years ago
  72. 01bd79f Add sb800 spi support. by zbao · 12 years ago
  73. c5fc7db Move C labels to start-of-line by Patrick Georgi · 12 years ago
  74. 399fcdd AMD southbridge: remove sp5100 by Kyösti Mälkki · 12 years ago
  75. b05bf5b amd/sb600: Move HAVE_HARD_RESET to southbridge by Patrick Georgi · 12 years ago
  76. c877d22 Force SB600 bootblock to use I/O for PCI config by Dave Frodin · 13 years ago
  77. 5257c27 Force SB700 bootblock code to use I/O for PCI config cycles. by Dave Frodin · 13 years ago
  78. 2eacc0e Force SB800 bootblock to use I/O for PCI config by Dave Frodin · 13 years ago
  79. da52aed Fixes Fam10/SR5650 cpu not recognized message. by Dave Frodin · 13 years ago
  80. 0e992be amd/sb700: Move HAVE_HARD_RESET to southbridge by Patrick Georgi · 12 years ago
  81. 024d8d9 amd/sb800: Move HAVE_HARD_RESET to southbridge by Patrick Georgi · 12 years ago
  82. 152738f amd/amd8111: Move HAVE_HARD_RESET to southbridge by Patrick Georgi · 12 years ago
  83. 131c936 SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapper by Kerry Sheh · 12 years ago
  84. 56f2a6d CIMX wrapper: remove redudant traversing sb800 and sb900 CIMX dir by Kerry Sheh · 13 years ago
  85. b5d81eb rs780: correct comment in switching_gpp_configurations() by Jonathan A. Kollasch · 13 years ago
  86. f3fe3d2 rs780: use bitwise rather than boolean not by Jonathan A. Kollasch · 13 years ago
  87. 8bd41cd rs780: power down GPPSB SB lane pads in correct PCIe core by Jonathan A. Kollasch · 13 years ago
  88. f154c01 Persimmon audio codec verb patch. by Marc Jones · 13 years ago
  89. 4c132bb Fix AMD 8132 and 8151 southbridge builds by Kyösti Mälkki · 13 years ago
  90. 7519d77 RS780: print the vgainfo by Denis 'GNUtoo' Carikli · 13 years ago
  91. 5ff7c13 remove trailing whitespace by Stefan Reinauer · 13 years ago
  92. 20fc631 Fix usb debug dongle support by Sven Schnelle · 13 years ago
  93. af3dce9 Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c. by Stefan Reinauer · 13 years ago
  94. 914377e Get rid of the old romstage-as-bootblock ROM layout by Patrick Georgi · 13 years ago
  95. 0f8590f sb600: Implement EHCI workaround by Patrick Georgi · 13 years ago
  96. 9bfa1c8 Added smbus block read/write for amd8111 by Oskar Enoksson · 13 years ago
  97. f3b0500 SB800: Hide unused gpp ports by Kerry Sheh · 13 years ago
  98. 328a694 AMD CPU and chipset fixes for compilation with gcc 4.6 by Stefan Reinauer · 13 years ago
  99. 971ebd8 Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6 by Stefan Reinauer · 13 years ago
  100. 390a337 amd/sb600: Enable COM2 at all times in early setup by Patrick Georgi · 13 years ago