1. fa36f50 coreboot-v2: Disable second serial port on Norwich by Jordan Crouse · 16 years ago
  2. 83a965d Implement GPIO configuration routines for the Intel 3100 southbridge, by Ed Swierk · 16 years ago
  3. 9d9518f cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doing a by Marc Jones · 16 years ago
  4. 2342f8b This patch adds pc keyboard init function call for qemu in v2 since some payloads assume by Aaron Lwe · 16 years ago
  5. 4f91417 Fix various issues on MSI MS-7135 board. by Jonathan A. Kollasch · 16 years ago
  6. a9a5f49 By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 by Ed Swierk · 16 years ago
  7. 65e0804 Remove inline from FAM10 CPU initialization functions. by Marc Jones · 16 years ago
  8. 7ca3ec2 Fix so pci device memory allocation does not use memory base address at 0xfec00000, this is reserved for APIC. by Aaron Lwe · 16 years ago
  9. c1cbff2 Add CPUID processor name string support for Fam10 CPUs. by Marc Jones · 16 years ago
  10. 403b89a On APs the ClLinesToNbDis was being left enabled from CAR setup. by Marc Jones · 16 years ago
  11. 202625e This board (http://www.ieiworld.com/en/product_IPC.asp?model=PCISA-LX) by Nikolay Petukhov · 16 years ago
  12. 3d1d3b2 by Myles Watson · 16 years ago
  13. 0eec1a8 by Myles Watson · 16 years ago
  14. c4a4116 by Ward Vandewege · 16 years ago
  15. a74a8ff Clean up and remove late initialization code that is no longer needed. by Marc Jones · 16 years ago
  16. f0174b5 Find matching settings for each CPUs FID, VID, and P-state registers and initialize them. by Marc Jones · 16 years ago
  17. 8127dc4 Update the FAM10 microcode to current versions. by Marc Jones · 16 years ago
  18. c74e362 Missed this file in the previous check-in, r3248. by Marc Jones · 16 years ago
  19. da4ce6b Add early MSR and PCI register initialization. by Marc Jones · 16 years ago
  20. 7bc63fd This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the by Christopher Kilgour · 16 years ago
  21. e3aeb93 Bring Fam10 memory controller init up to date with the latest AMD BKDG by Marc Jones (marc.jones · 16 years ago
  22. 78f59f8 Re-add files I deleted by mistake in r3219. They are meant for a different by Marc Jones (marc.jones · 16 years ago
  23. df22f78 Don't check exclusive IRQ fieldin the PIR table. by Marc Jones(marc.jones · 16 years ago
  24. 0dc5697 This patch halts the tco timer early in the boot process on all ICH series southbridges. by Joseph Smith · 16 years ago
  25. 4afb7fb Add a workaround for a bug in some binutils version which strictly by Carl-Daniel Hailfinger · 16 years ago
  26. 2b85b63 Setting an integrated southbridge device (like SATA or USB2.0) to by Ed Swierk · 16 years ago
  27. 23cd49a Remove i82801DB files that I meant to delete in r3206. by Joseph Smith · 16 years ago
  28. 06ae639 Tiny style fix for consistency (trivial). by Ed Swierk · 16 years ago
  29. 868de98 Removal of i82801DB (ICH4) by Joseph Smith · 16 years ago
  30. c4e052c The early init code of several Intel southbridge chipsets calls by Ed Swierk · 16 years ago
  31. 71f846c Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots by Ed Swierk · 16 years ago
  32. 1e185e8 Add support for the TeleVideo TC7020. by Kenji Noguchi · 16 years ago
  33. 9c2255c Now coreboot performs IRQ routing for some boards. by Nikolay Petukhov · 16 years ago
  34. da0efc4 Fix for irq routing issues. by Joseph Smith · 16 years ago
  35. 316e07f Following patch adds K8M890 support. It initializes the AGP and graphics UMA. by Rudolf Marek · 16 years ago
  36. c221349 Following patch will setup KT890 HT automatically. It will find the by Rudolf Marek · 16 years ago
  37. cfcc9ca * split model_centaur into model_c3 and model_c7 by Stefan Reinauer · 16 years ago
  38. a2ccf9f Add support for the MSI MS-6119 mainboard. by Uwe Hermann · 16 years ago
  39. fa510c7 Clarify LZMA code license. by Carl-Daniel Hailfinger · 16 years ago
  40. 4f83d7e oops. sorry, wrong checkin. This patch backs out r3155 and instead contains the by Ed Swierk · 16 years ago
  41. 354e2d3 This patch implements support for the Intel 3100 Development Kit by Ed Swierk · 16 years ago
  42. a9faea8 This patch implements support for the Intel 3100 integrated by Ed Swierk · 16 years ago
  43. aaea11b Here is an updated patch addressing most of Uwe's and Peter's by Ed Swierk · 16 years ago
  44. 62eee3f This patch implements support for the Intel 3100 integrated SuperIO and UART. by Ed Swierk · 16 years ago
  45. 791265a This patch updates the PCI IDs for Intel 3100 devices. by Ed Swierk · 16 years ago
  46. 5671787 Following patch extends the ROM decoding to last 1MB, allowing to use larger by Rudolf Marek · 16 years ago
  47. dd52e17 Following patch fixes the retrain/reset sequence which caused problem with some by Rudolf Marek · 16 years ago
  48. 3182122 Update AMD CPU list based on Revision Guide for AMD NPT Family 0Fh Processors, by Uwe Hermann · 16 years ago
  49. b681570 Formatting fixes, no content changes (trivial). by Uwe Hermann · 16 years ago
  50. 6a1dc86 Initial support for the Intel 82830 northbridge and RCA RM4100 board. by Joseph Smith · 16 years ago
  51. c4f5365 Various cosmetic and coding style fixes for ASUS A8V-E SE (trivial). by Uwe Hermann · 16 years ago
  52. 9b6b63e In pci_device.c, the class for VGA was not tested properly, leading to by Ronald Hoogenboom · 16 years ago
  53. 17632a2 by Ward Vandewege · 16 years ago
  54. 56cf01f by Ronald Hoogenboom · 16 years ago
  55. 8684520b This trivial patch removes an unused local variable, thus getting rid of by Ronald Hoogenboom · 16 years ago
  56. bd3f93e Add support for the Via CN700 with a C7 CPU and DDR2 RAM. Only a single DIMM is by Corey Osgood · 16 years ago
  57. f327d9f Route device IRQ through PCI bridge instead in mptable. by Yinghai Lu · 16 years ago
  58. 8eff1e3 Initial support for MSI MS-7135 (K8N Neo3) mainboard. by Jonathan A. Kollasch · 16 years ago
  59. b05d4bb I'm attaching the patch which should fix both problems. Fix the by Rudolf Marek · 16 years ago
  60. bcd28f2 Attached patch fixes two typos in the sio_setup routine (comment + wrong exitLDN by Rudolf Marek · 16 years ago
  61. 8dcab78 This patch introduces virtual LDNs changes for W83627EHF driver. Not only LDN 7 and 9 are by Rudolf Marek · 16 years ago
  62. 0b8af01 Use virtual LDNs. It enables the GPIOs correctly (it preserves the GPIO5/2 from a sio_setup. As side effect I can now by Rudolf Marek · 16 years ago
  63. 623df67 Some SIO/PNP devices are abusing register 0x30 for multiple LDN enables, like by Rudolf Marek · 16 years ago
  64. 5eb25bf add $(CROSS_COMPILE) to ar calls. by Marc Jones · 16 years ago
  65. b8c2aa2 by Myles Watson · 16 years ago
  66. cb5c9fb Factor out print_conf() from Geode LX mainboard directories. The by Carl-Daniel Hailfinger · 16 years ago
  67. 10aca3c This patch fixes the decoding of the IO address range 0x0820->0x0827 into the by Florentin Demetrescu · 16 years ago
  68. d8a74c9 by Ward Vandewege · 16 years ago
  69. f3dd1b7 v2: Fix Serengeti-Cheetah flags too by Jordan Crouse · 16 years ago
  70. 71a8225 [V2]: Add CFLAGS to targets to suck in any passed in flags by Jordan Crouse · 16 years ago
  71. d27aa6e Add support for the Abit BE6-II V2.0 board. by Uwe Hermann · 16 years ago
  72. 3bbf2ff Add a new record type "console" for lbtable, and insert one record by Patrick Georgi · 16 years ago
  73. 25a3744 by Ronald G. Minnich · 16 years ago
  74. 8c2a0c1 This patch adds a new record type for lbtable to provide information by Patrick Georgi · 16 years ago
  75. 14a3af1 Use "--build-id=none" as linker flags if build-id is supported. by Marc Karasek · 16 years ago
  76. ca374d4 rename linuxbios_* files, too. by Stefan Reinauer · 16 years ago
  77. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 16 years ago
  78. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 16 years ago
  79. 6211ae1 Fix the documentation of GPIO setup, tell W83627EHF to use external by Rudolf Marek · 16 years ago
  80. aeea7c1 Via C3 datasheets don't make any mention of microcode updates, and the by Corey Osgood · 16 years ago
  81. ed8dc58 Add a workaround for a bug in some binutils version which strictly by Carl-Daniel Hailfinger · 16 years ago
  82. 1923fc4 This patch introduces 4k CAR size granularity for the AMD x86 CAR code. by Carl-Daniel Hailfinger · 16 years ago
  83. 247a423 Use macros to improve readability of the device-to-pin IRQ assignments by Carl-Daniel Hailfinger · 16 years ago
  84. 188288a Fix compilation of Tyan S2735 which was broken by accident in r3038. by Carl-Daniel Hailfinger · 16 years ago
  85. f2ecb74 Remove some DOS line endings accidentially introduced in r3014. by Carl-Daniel Hailfinger · 16 years ago
  86. 4d1aa0a This patch is an attempt at introducing 4k CAR size granularity for the by Carl-Daniel Hailfinger · 16 years ago
  87. eaca2c3 Ubuntu's gcc doesn't write "install:" in german locales. by Patrick Georgi · 16 years ago
  88. f4c57a9 Improve readability and remove redundancy by wrapping by Torsten Duwe · 16 years ago
  89. 1f2f800 Since a VGA console and the need to run any option ROMs are by Torsten Duwe · 16 years ago
  90. 1229fe4 The following mainboards had a file named microcode_updates.c in their by Carl-Daniel Hailfinger · 16 years ago
  91. 9cb314b Add Intel 3100 integrated northbridge/southbridge/superio PCI IDs. by Ed Swierk · 16 years ago
  92. 679e14e Add an interrupt entry for the onboard firewire controller, by Torsten Duwe · 16 years ago
  93. 8f1bd6a More abuild fixes, this should be the last (trivial) by Corey Osgood · 16 years ago
  94. 17217ac Fix for newer iasl versions (trivial) by Corey Osgood · 16 years ago
  95. c9a8d11 trivial fix for abuild. by Stefan Reinauer · 16 years ago
  96. ba8965c Changed the stop_this_cpu() to just hlt. by Marc Jones · 16 years ago
  97. 2ce8bfd Initial AMD Serengeti_Cheetah_FAM10 platform for Barcelona support. by Marc Jones · 16 years ago
  98. 0da5cde Additional early AMD8111 southbridge support for Barcelona platforms. by Marc Jones · 16 years ago
  99. 8ae8c88 Initial AMD Barcelona support for rev Bx. by Marc Jones · 16 years ago
  100. 2006b38 Whitespace and other code cleanup in peperation for AMD Barcelona support. by Marc Jones · 16 years ago