Gitiles
Code Review Sign In
review.coreboot.org / coreboot / dd662870dd9da0be937c593b0b62f3b5c8030cf7 / src / northbridge / intel / sandybridge / raminit_native.c
  1. dd66287 nb/intel/sandybridge/raminit: Add ECC support by Patrick Rudolph · 7 years ago
  2. a38fee3 nb/intel/sandybridge: Rename raminit_ivy.c by Angel Pons · 4 years, 4 months ago[Renamed from src/northbridge/intel/sandybridge/raminit_ivy.c]
  3. efbed26 nb/intel/sandybridge: Unify the code paths by Angel Pons · 4 years, 4 months ago
  4. 29f391ec nb/intel/sandybridge: Add print for PLL_REF100_CFG by Angel Pons · 4 years, 4 months ago
  5. a6c8b4b nb/intel/sandybridge: Rewrite get_FRQ by Angel Pons · 4 years, 4 months ago
  6. 48409b8 nb/intel/sandybridge: Cache FRQ index by Angel Pons · 4 years, 4 months ago
  7. df09bdb nb/intel/sandybridge: Rewrite table accessors by Angel Pons · 4 years, 4 months ago
  8. 825332d nb/intel/sandybridge: Factor out timing tables by Angel Pons · 4 years, 4 months ago
  9. 6e5aabd nb/intel/sandybridge: Use SPDX headers by Angel Pons · 4 years, 4 months ago
  10. 89ae6b8 nb/intel/sandybridge: Use cached CPUID by Angel Pons · 4 years, 4 months ago
  11. 7c49cb8 nb/intel/sandybridge: Tidy up code and comments by Angel Pons · 4 years, 4 months ago
  12. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  13. 8852188 nb/intel/sandybridge: Add a bunch of MCHBAR defines by Angel Pons · 4 years, 6 months ago
  14. 1aba2a3 nb/intel/sandybridge: Make MCHBAR arithmetics consistent by Angel Pons · 4 years, 6 months ago
  15. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  16. a342f39 src: Remove unneeded whitespace by Elyes HAOUAS · 6 years ago
  17. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  18. dabebc3 nb/intel/sandybridge: support more XMP timings by Dan Elkouby · 6 years ago
  19. 9ed74b5 nb/intel/ivybridge: Improve CAS freq selection by Arthur Heymans · 7 years ago
  20. cb7d6a1 nb/intel/sandybridge/raminit: Add default values by Patrick Rudolph · 8 years ago
  21. cab4d3d nb/intel/sandybridge/raminit: Add 100MHz refclock support by Patrick Rudolph · 8 years ago
  22. 77eaba3 nb/intel/sandybridge/raminit: Use Ivy Bridge specific values by Patrick Rudolph · 8 years ago
  23. 50db9c9 nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timings by Arthur Heymans · 7 years ago
  24. 305035c nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge by Patrick Rudolph · 8 years ago