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review.coreboot.org / coreboot / dc3a6f8593c5a204e48e7c858b9a3ed83ac40909 / src / soc / intel / xeon_sp / spr / chip.c
  1. dc3a6f8 tree: Drop duplicated <device/pci_{def,type}.h> by Elyes Haouas · 4 months ago
  2. c0d3cf1 soc/intel: Remove blank lines before '}' and after '{' by Elyes Haouas · 5 months ago
  3. e357ac3 soc/intel/xeon_sp: Use common _CRS code generation by Patrick Rudolph · 6 months ago
  4. 255f927 soc/intel/xeon_sp: Further share domain creation logics in Xeon-SP by Shuo Liu · 1 year, 5 months ago
  5. 40e0748 soc/intel/xeon_sp: Add ACPI names by Patrick Rudolph · 6 months ago
  6. 106d7b3 soc/intel/xeon_sp: Locate PCU by PCI device ID by Patrick Rudolph · 7 months ago
  7. f25d58c soc/intel/xeon_sp/numa: Store pointer to device by Patrick Rudolph · 7 months ago
  8. bfb11be include/device/device.h: Remove CHIP_NAME() macro by Nicholas Sudsgaard · 7 months ago
  9. 550f55e soc/intel/xeon_sp: Redesign resource allocation by Arthur Heymans · 2 years ago
  10. ac02857 soc/intel/xeon_sp: Skip empty sockets by Patrick Rudolph · 1 year, 1 month ago
  11. 3ed903f soc/intel/xeon_sp/spr: Add Sapphire Rapids ramstage code by Jonathan Zhang · 1 year, 7 months ago