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review.coreboot.org / coreboot / dc12a3817ae49123fadbe99fcab6c039f3b4b53d / src / vendorcode / amd / opensil / genoa_poc / ramstage.c
  1. dc12a38 soc/amd/genoa_poc: rely less on boot state hooks by Felix Held · 7 months ago
  2. e5197e1 vc/amd/opensil/genoa_poc: move configure_mpio call to setup_opensil by Felix Held · 7 months ago
  3. d123f8d soc/amd/genoa: rename to genoa_poc by Felix Held · 8 months ago
  4. c7be078 vc/amd: use 'openSIL' spelling in comments & help text by Felix Held · 8 months ago
  5. 5f6cf61 vendorcode/amd/genoa: Parse APOB for DRAM layout by Arthur Heymans · 1 year, 1 month ago
  6. 62389ab vendorcode/amd/opensil: Add SATA configuration by Arthur Heymans · 1 year, 1 month ago
  7. f643a4d vendorcode/amd/opensil: Add USB configuration by Martin Roth · 11 months ago
  8. 81ceea1 vendorcode/amd/opensil: Set up resource manager input block by Arthur Heymans · 1 year, 1 month ago
  9. adee6a6 vendorcode/amd/opensil: Add initial setup and API calls by Arthur Heymans · 1 year, 1 month ago