Gitiles
Code Review Sign In
review.coreboot.org / coreboot / da83a5f18e252e4b8e6259fd7c91e67ca25ee6cd / src / northbridge / intel / sandybridge
  1. da83a5f Fixes to enable RC6 on IvyBridge by Duncan Laurie · 12 years ago
  2. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 12 years ago
  3. 88fc0b9 Sandybridge: Remove remnants of FDT support from MRC cache code by Stefan Reinauer · 12 years ago
  4. 6e901fd Sandybridge: Fix MRC cache calculation by Stefan Reinauer · 12 years ago
  5. bb11e60 Hook up MRC cache update by Stefan Reinauer · 12 years ago
  6. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  7. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  8. f125d80 Add missing newline to printk in Sandybridge init code by Stefan Reinauer · 12 years ago
  9. cafedcf Strip quotes from Sandybridge MRC blob by Stefan Reinauer · 12 years ago
  10. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  11. 8508cff Update Ivybridge GT power meter tables by Duncan Laurie · 12 years ago
  12. dd585b8 Update ivybridge graphics initialization by Duncan Laurie · 12 years ago
  13. 7b508dd Only send ME Dram Init Done message on Sandybridge by Duncan Laurie · 12 years ago
  14. 0ff99b7 Modify DMI init for IvyBridge by Vincent Palatin · 12 years ago
  15. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  16. 6ea86b1 Sandybridge: Temporarily disable MRC cache finding code by Stefan Reinauer · 12 years ago
  17. e9dfdd9 Reverse Vendor ID & Device ID for map_oprom_vendev() by Martin Roth · 12 years ago
  18. 16401b8 SMM: Add udelay on Sandybridge systems by Stefan Reinauer · 12 years ago
  19. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago