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review.coreboot.org / coreboot / d85400d80548d8db8dd604d959fe858d33ca39be / src
  1. d85400d Handle drivers/ equally to any other sub directory. by Stefan Reinauer · 13 years ago
  2. 8345a19 fix mainboards that were including earlymtrr.c without actually using it. by Stefan Reinauer · 13 years ago
  3. 24ef134 drop half an uart8250 implementation from smiutil and use the common code by Stefan Reinauer · 13 years ago
  4. 40e42a8 fix coreboot compilation without serial console enabled. by Stefan Reinauer · 13 years ago
  5. 23f49a8 earlymtrr.c: wipe some dead code, use names instead of numbers and some by Stefan Reinauer · 13 years ago
  6. 1fdfed1 add some comments to walkcbfs.S by Stefan Reinauer · 13 years ago
  7. 31853d8 - drop remaining CONFIG_ROM_IMAGE_SIZE by Stefan Reinauer · 13 years ago
  8. 8902502 drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCH by Stefan Reinauer · 13 years ago
  9. 6108958 nvidia mcp55: drop unused dbg_info by Stefan Reinauer · 13 years ago
  10. 28cd291 cosmetic cleanup of sis966 usb2 code by Stefan Reinauer · 13 years ago
  11. 139e6f9 Use symbolic names for some MTRR bits instead of numbers in CAR code by Stefan Reinauer · 13 years ago
  12. 14748a5 Lenovo H8 EC: add missing include for thermal.asl by Sven Schnelle · 13 years ago
  13. 3e2f679 Lenovo H8 EC: Set fancontrol to Automatic management by Sven Schnelle · 13 years ago
  14. ae08c56 PC87384: add GPIO defines by Sven Schnelle · 13 years ago
  15. 484281b by Marc Jones · 13 years ago
  16. 5005bb06 Unify use of post_code by Alexandru Gagniuc · 13 years ago
  17. 1fa61eb PMH7: Add chip config by Sven Schnelle · 13 years ago
  18. ffcd143 EC: Add Lenovo H8 by Sven Schnelle · 13 years ago
  19. 148a4f5 i945: improve get_top_of_ram() by Sven Schnelle · 13 years ago
  20. 61aee5f In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__. by Stefan Reinauer · 13 years ago
  21. df6fd56 X60: use pnp_write_config() instead of custom function by Sven Schnelle · 13 years ago
  22. b31eb3e X60: move ec version info code to log_ec_version() by Sven Schnelle · 13 years ago
  23. bc60833 X60: assert audio mute before entering Suspend by Sven Schnelle · 13 years ago
  24. bdb1059 X60: log firmware version by Sven Schnelle · 13 years ago
  25. 8099cbf X60: blink suspend LED during resume by Sven Schnelle · 13 years ago
  26. 5fc5a80 X60: we have ACPI_RESUME by Sven Schnelle · 13 years ago
  27. 4678914 X60: deassert audio mute on boot by Sven Schnelle · 13 years ago
  28. b1d5d39 remove swp files accidently added by Sven Schnelle · 13 years ago
  29. fea6bd1 X60: add dock code for Ultrabase X6 by Sven Schnelle · 13 years ago
  30. 1aba096 Add GPIO definitions to PC87392 superio by Sven Schnelle · 13 years ago
  31. 8a539b6 ICH7: Fix register naming error by Sven Schnelle · 13 years ago
  32. d69438e BUILD: add missing config.h dependency by Sven Schnelle · 13 years ago
  33. 910f4ca Add support for Supermicro H8scm. by Zheng Bao · 13 years ago
  34. d3de3ee Add the SR5650 & SP5100 to the Kconfig and Makefile.inc by Zheng Bao · 13 years ago
  35. 2ca2f17 Add AMD C32 support. It is based on other existing Fam10 code. by Zheng Bao · 13 years ago
  36. c342223 SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx. by Zheng Bao · 13 years ago
  37. 98fcc09 Add AMD SR56x0 support. by Zheng Bao · 13 years ago
  38. 8a28188 This is for board Supermicro H8scm. The code was done by existing chips and by Zheng Bao · 13 years ago
  39. 0446f96 X60: Add notification for LID objects by Sven Schnelle · 13 years ago
  40. e106999 X60: remove beep call from _Q26/_Q27 by Sven Schnelle · 13 years ago
  41. 4a46e89 Fix breaking the build after removing files in tthe previous checkin. by Marc Jones · 13 years ago
  42. 9c2fb60 Perform cleanup and file shrinkage of the AMD AGESA code. by Frank.Vibrans · 13 years ago
  43. ea1c0a7 Fix power_on_after_fail handling on AMD SB600 by Josef Kellermann · 13 years ago
  44. 0882728 X60: Clear EC events when wake GPE is triggered by Sven Schnelle · 13 years ago
  45. f9a0b92 ACPI EC: add ec_query function by Sven Schnelle · 13 years ago
  46. 07ca1c4 X60: LPC bus is LPCB, not LPC by Sven Schnelle · 13 years ago
  47. 91c31da X60: fix typo in dsdt.asl by Sven Schnelle · 13 years ago
  48. b188a93 X60: Add _PRW/_PSW methods to LID/SLPB objects by Sven Schnelle · 13 years ago
  49. 0238a9c ec/acpi: make ACPI register pair configurable by Sven Schnelle · 13 years ago
  50. 8d94d7c ACPI EC: add ec_set_bit() / ec_clr_bit() by Sven Schnelle · 13 years ago
  51. 314dd0b Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF. by Scott Duplichan · 13 years ago
  52. 57205c7 Add option_table.h as dependency for all C based object files if option tables are used. by Patrick Georgi · 13 years ago
  53. fab35e3 Move cmos.default handling to bootblock by Patrick Georgi · 13 years ago
  54. 85e666d X60: add thermal zone 1 by Sven Schnelle · 13 years ago
  55. b641e98 X60: add thermal zone 0 by Sven Schnelle · 13 years ago
  56. 09b3629 Add P-states for select Socket 754 processors. by Jonathan Kollasch · 13 years ago
  57. c9a08dd Redo r6099 after copy&pasted code reintroduced DIMMx #defines by Patrick Georgi · 13 years ago
  58. d5782f3 Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code. by Jonathan Kollasch · 13 years ago
  59. fadb004 Improve ck804 IOAPIC and HPET resource handling. by Jonathan Kollasch · 13 years ago
  60. a73ffa0 Configure PCIe lanes on ms7135 as original BIOS does. by jakllsch · 13 years ago
  61. 071d835 add PC87384 SuperIO by Sven Schnelle · 13 years ago
  62. 7b9bbee Fixes licensing of src/southbridge/via/k8t890/k8x8xx.h to GPLv2+ from GPLv3. by Alexandru Gagniuc · 13 years ago
  63. 8241941 Fix some subsystemid statements in r6421 by Sylvain "ythier" Hitier · 13 years ago
  64. b8269e2 Fix a simple whitespace error in src/include/device/device.h by Sven Schnelle · 13 years ago
  65. 9132102 Use subsystem id from devicetree.cb instead of Kconfig and move by Sven Schnelle · 13 years ago
  66. 270a908 Add subsystemid option to sconfig by Sven Schnelle · 13 years ago
  67. 11ac1cf Mark non-returning function as noreturn to help some compiler versions by Patrick Georgi · 13 years ago
  68. d175f44 add functions to set Subsystem Vendor/Device to rl5c746 by Sven Schnelle · 13 years ago
  69. b671172 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  70. 6bdc83b Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  71. 061c89e Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  72. c313210 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  73. 6276b6f Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  74. 82b241a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  75. 5bcedee Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  76. ce62350 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  77. e80ce0a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  78. 26f97d2 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  79. 19245c9 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  80. 9cbcf1a Kino devicetree.cb SIO PNP devices were not matched up with the by Marc Jones · 13 years ago
  81. e485aa4 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  82. 6fcc961 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  83. 1f93fea Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  84. 0e5d3e1 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  85. adb23a5 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  86. 1f4fffb Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  87. f7ef421 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  88. d26e5e6 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  89. 40f9b4b0 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  90. 1d80e51 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  91. 9683b1d Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  92. a5cbd25 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  93. d729459 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
  94. 70a3733 Add 300 MHz and 500 MHz HT frequency limits by Xavi Drudis Ferran · 13 years ago
  95. 4c28a6f Make AMD Fam10h CPU microcode updates optional in Expert mode by Xavi Drudis Ferran · 13 years ago
  96. 837403d Following patch fills in the callbacks for PCIe x16 resets. This board uses GPM8,GPM9 as reset toggles. by Rudolf Marek · 13 years ago
  97. 656060d Correct error in ASRock E350M1 commit that breaks build for ASRock 939a785gmh. by Scott Duplichan · 13 years ago
  98. 63896e7 Add support for the ASRock E350M1, an AMD family 14h Fusion board. by Scott Duplichan · 13 years ago
  99. 199c694 It adds support for automatic PSS object generation for AMD pre fam Fh CPU. Those CPUs require a hardcoded table, which I managed to rewrite during one particularly boring flight. Too pity it is only for Opteron CPUs. Someone needs to finish the second PDF for All others Athlons and Semprons. by Rudolf Marek · 13 years ago
  100. ed1d116 Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS by Josef Kellermann · 13 years ago