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review.coreboot.org / coreboot / d3801f4f6fe985b7c16ada84a457da25f23b87a0 / src / cpu / x86
  1. 2bdfb48 Fixes and Sandybridge support for lapic cpu init by Stefan Reinauer · 11 years ago
  2. 334532e Add Sandybridge/Cougar Point support to SMM relocation handler by Stefan Reinauer · 11 years ago
  3. c00dfbc Cache 8MB flash instead of 4MB by Stefan Reinauer · 11 years ago
  4. 5b6404e Fix timer frequency detection on Sandybridge by Stefan Reinauer · 11 years ago
  5. deda997 Invalidate cache before first jump by Stefan Reinauer · 11 years ago
  6. 8c5b58e Update documentation in smmrelocate.S to mention TSEG by Stefan Reinauer · 11 years ago
  7. 3aa067f Add support to run SMM handler in TSEG instead of ASEG by Stefan Reinauer · 11 years ago
  8. 7b67892 Make MTRR min hole alignment 64MB by Duncan Laurie · 12 years ago
  9. 527fc74 Fix MB calculation in the reporting of the MTRR hole by Duncan Laurie · 12 years ago
  10. 7389fa9 MTRR: add alternate allocation method for odd memory maps by Duncan Laurie · 12 years ago
  11. 8bb7723 Add Kconfig options to enable TSEG and set a size by Duncan Laurie · 12 years ago
  12. 67aa3d6 drop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not needed by Stefan Reinauer · 12 years ago
  13. 00093a8 Add an option to keep the ROM cached after romstage by Stefan Reinauer · 12 years ago
  14. a01ae62 Fix possible deadlock on SMP stop_this_cpu by Kyösti Mälkki · 12 years ago
  15. 1c93d90 ROMCC boards have no XIP limit by Patrick Georgi · 12 years ago
  16. 7863015 Fix address of IDT in real-mode entry by Kyösti Mälkki · 12 years ago
  17. 8907e81 move console includes to central console/console.h by Stefan Reinauer · 12 years ago
  18. c5fc7db Move C labels to start-of-line by Patrick Georgi · 12 years ago
  19. 472efa6 Remove whitespace. by Patrick Georgi · 12 years ago
  20. 0713ca3 post code: Replaced hard-coded post code with macro by Vikram Narayanan · 12 years ago
  21. 15370ca trivial: spelling fixes in comments by Vikram Narayanan · 12 years ago
  22. c6daaa7 Leave SSE and MMX instructions enabled in coreboot by Stefan Reinauer · 12 years ago
  23. adfbcb79 MTRR: get physical address size from CPUID by Sven Schnelle · 12 years ago
  24. eafb18b Bootblock does not need a unique boot_cpu() by Kyösti Mälkki · 12 years ago
  25. 0dbfb54 Remove unused code files and cosmetic changes by Kyösti Mälkki · 12 years ago
  26. 2a40ebc Fix post_code in 16bit entry by Kyösti Mälkki · 12 years ago
  27. 5ff7c13 remove trailing whitespace by Stefan Reinauer · 12 years ago
  28. 784544b Remove XIP_ROM_BASE by Patrick Georgi · 12 years ago
  29. 1da1046 Get rid of AUTO_XIP_ROM_BASE by Patrick Georgi · 12 years ago
  30. 3128685 SMM: Move wbinvd after pmode jump by Stefan Reinauer · 12 years ago
  31. 71496be Load an IDT with NULL limit by Stefan Reinauer · 12 years ago
  32. 78834b7 Miscellaneous AMD F14 warning fixes by efdesign98 · 12 years ago
  33. 3cab93c Add SSE3 dependent code by efdesign98 · 12 years ago
  34. 7f76290 Small SMM fixups by Rudolf Marek · 12 years ago
  35. 47b3fb4 SMM: flush caches after disabling caching by Sven Schnelle · 12 years ago
  36. bfe8e51 SMM: don't overwrite SMM memory on resume by Sven Schnelle · 12 years ago
  37. 6649d97 This replaces the fixed shift values in the apic timer init with macros. by Vikram Narayanan · 12 years ago
  38. 4885daa Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an by Stefan Reinauer · 12 years ago
  39. 582748f Fix some more misuses of ifdef/if defined by Stefan Reinauer · 12 years ago
  40. 24ef134 drop half an uart8250 implementation from smiutil and use the common code by Stefan Reinauer · 12 years ago
  41. 23f49a8 earlymtrr.c: wipe some dead code, use names instead of numbers and some by Stefan Reinauer · 12 years ago
  42. 8902502 drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCH by Stefan Reinauer · 12 years ago
  43. 5005bb06 Unify use of post_code by Alexandru Gagniuc · 12 years ago
  44. 5bb9fd6 Now that the VIA code is run above 1Meg (like other boards), it should by Kevin O'Connor · 13 years ago
  45. cadc545 SMM for AMD K8 Part 1/2 by Stefan Reinauer · 13 years ago
  46. be61a17 Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board which uses it. by Patrick Georgi · 13 years ago
  47. 8aedcbc - Fix shortcoming in Kconfig when handling multiple "choice"s by Stefan Reinauer · 13 years ago
  48. abc0c85 Printing coreboot debug messages on VGA console is pretty much useless, since by Stefan Reinauer · 13 years ago
  49. f3cce2f MTRR related improvements for AMD family 10h and family 0Fh systems by Scott Duplichan · 13 years ago
  50. fa78d99 Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial. by Myles Watson · 13 years ago
  51. 236aef2 To reduce boot time, remove the double startup IPI and 10 ms delay from lapic_cpu_init.c. The change is by Scott Duplichan · 13 years ago
  52. 8463dd9 Rename build system variables to be more intuitive, and by Patrick Georgi · 13 years ago
  53. 17cae35 Forgot to 'svn add' src/cpu/x86/name (trivial). by Uwe Hermann · 13 years ago
  54. 5211a70 Add a few missing license headers based on svn logs, and also add a by Uwe Hermann · 13 years ago
  55. 16db6c3 Whitespace/typo/cosmetic fixes (trivial). by Uwe Hermann · 13 years ago
  56. 17daf9a Adapt comment, too. (trivial) by Patrick Georgi · 13 years ago
  57. a4c0a1d Make timer2 the default choice for TSC initialization. by Patrick Georgi · 13 years ago
  58. 3e4daf1 2ms is enough time to accurately obtain the clock rate. by Kevin O'Connor · 13 years ago
  59. 704b596 We call this cache as ram everywhere, so let's call it the same in Kconfig by Stefan Reinauer · 13 years ago
  60. a6f0e12 clean up comment in entry32.inc by Stefan Reinauer · 13 years ago
  61. c9ce895 make early_mtrr_init() invisible for cache as ram targets as it breaks them. by Stefan Reinauer · 13 years ago
  62. bc0f7a6 - fix SMM code relocation race by Stefan Reinauer · 13 years ago
  63. b987f7b don't generate C source code file but use objcopy to include the SMM blob. by Stefan Reinauer · 13 years ago
  64. 14e2277 Since some people disapprove of white space cleanups mixed in regular commits by Stefan Reinauer · 13 years ago
  65. 5f5436f drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h" by Stefan Reinauer · 13 years ago
  66. 5d3dee8 drop quite a lot of dead code that did nothing but produce warnings and make by Stefan Reinauer · 13 years ago
  67. ccdd20a move cpu/x86/car to cpu/intel/car as previously discussed on the mailing list. by Stefan Reinauer · 13 years ago
  68. 5934b50 Move the CPU specific includes from by Patrick Georgi · 13 years ago
  69. f1ce6f2 - move the XIP_ROM_* flags to src/cpu/x86/Kconfig exclusively by Patrick Georgi · 13 years ago
  70. d4f5373 zero warnings days. by Stefan Reinauer · 13 years ago
  71. d41a0bc Drop the need for cpu_reset, it's really just a short cut to stage2. by Stefan Reinauer · 13 years ago
  72. aa987b2 drop unused files by Stefan Reinauer · 13 years ago
  73. 853263b copy_and_run.c is not needed twice, and it is used on non-car too. by Stefan Reinauer · 13 years ago
  74. 10b29d8 thin out romcc epilogue and have it call copy_and_run as by Stefan Reinauer · 13 years ago
  75. 8a926845 clean up age old via epia target. by Stefan Reinauer · 13 years ago
  76. 8f2c616 No warnings day, next round. by Stefan Reinauer · 13 years ago
  77. 3c8ac78 remove more warnings. by Stefan Reinauer · 13 years ago
  78. c65666f remove more warnings by Stefan Reinauer · 13 years ago
  79. 0c781b2 - get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files. by Stefan Reinauer · 13 years ago
  80. 51e142f make only needs to read Makefile.incs once, thanks to the by Patrick Georgi · 14 years ago
  81. 5f0aefb SMM: remove hack that was needed back in oldconfig times. by Stefan Reinauer · 14 years ago
  82. c02b4fc printk_foo -> printk(BIOS_FOO, ...) by Stefan Reinauer · 14 years ago
  83. 78acf932 Remove remaining uses of by Patrick Georgi · 14 years ago
  84. 348a1ba fix a couple of warnings by Stefan Reinauer · 14 years ago
  85. 020f51f Add scan-build support to the build system. by Patrick Georgi · 14 years ago
  86. 01ce601 This patch is from 2009-10-20 by Uwe Hermann · 14 years ago
  87. 9d24c7f - Simplify stack size determination: MAX_CPUS * STACK_SIZE by Patrick Georgi · 14 years ago
  88. 548dbe7 Random cosmetic fixes (trivial). by Uwe Hermann · 14 years ago
  89. 92b85aa Fix SMM handler comment. Thanks for noticing, Peter! by Stefan Reinauer · 14 years ago
  90. 881a553 mini update SMM: by Stefan Reinauer · 14 years ago
  91. de3206a This is a general cleanup patch by Stefan Reinauer · 14 years ago
  92. d4c5c44 trival. All the changes is about comment and spaces. by Zheng Bao · 14 years ago
  93. c70e9fc Various license header consistency fixes (trivial). by Uwe Hermann · 14 years ago
  94. ba295dc Fix AUTO_XIP_ROM_BASE issues on AMD boards with certain compilers, by Patrick Georgi · 14 years ago
  95. 535e3b4 Adapt all uses of CONFIG_XIP_ROM_BASE to use by Patrick Georgi · 14 years ago
  96. 9a432ab Forgot a CBFS_PREFIX change in appropriate commit (r5102). by Patrick Georgi · 14 years ago
  97. abf2ad7 newconfig is no more. by Patrick Georgi · 14 years ago
  98. 1f807fd - Fix UDELAY options and HAVE_INIT_TIMER [kconfig] by Patrick Georgi · 14 years ago
  99. ce56835 - use LAPIC timer if selected (instead of TSC all the time) [kconfig] by Patrick Georgi · 14 years ago
  100. 9341acd Tiny Bootblock, step 1/n. by Patrick Georgi · 14 years ago