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coreboot
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d2bbc68fa32ec60f8aa83870559beadbef0d1c9f
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src
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soc
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intel
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baytrail
/
scc.c
d2bbc68
soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND register
by Elyes HAOUAS
· 4 years, 4 months ago
c3f58f6
soc/intel/baytrail: Use SPDX for GPL-2.0-only files
by Angel Pons
· 4 years, 5 months ago
1c6d8a9
soc: Remove copyright notices
by Patrick Georgi
· 4 years, 5 months ago
6e0044d
soc: Remove useless include <device/pci_ids.h>
by Elyes HAOUAS
· 6 years ago
17a3ceb
soc/intel/baytrail: Get rid of device_t
by Elyes HAOUAS
· 6 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
18ea2d3
baytrail: Change all SoC headers to <soc/headername.h> system
by Julius Werner
· 10 years ago
616f394
baytrail: utilize reg_script_run_on_dev()
by Aaron Durbin
· 11 years ago
430bf0d
baytrail: Add support for LPSS and SCC devices in ACPI mode
by Duncan Laurie
· 11 years ago
c626b74
baytrail: initialize common SSC functionality
by Aaron Durbin
· 11 years ago