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d293b20b840037211d9b43ded17901354e5204ad
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src
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northbridge
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intel
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x4x
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Makefile.mk
8b1aa38
northbridge: Rename Makefiles from .inc to .mk
by Martin Roth
· 7 months ago
[Renamed from src/northbridge/intel/x4x/Makefile.inc]
c4b7027
src: Remove leading blank lines from SPDX header
by Elyes HAOUAS
· 4 years, 3 months ago
6b5bc77
treewide: Remove "this file is part of" lines
by Patrick Georgi
· 4 years, 3 months ago
c49d7a3
src/: Replace GPL boilerplate with SPDX headers
by Patrick Georgi
· 4 years, 3 months ago
f3f36fa
src (minus soc and mainboard): Remove copyright notices
by Patrick Georgi
· 4 years, 5 months ago
7843bd5
nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK
by Arthur Heymans
· 4 years, 9 months ago
bf53acc
nb/intel/x4x: Move boilerplate romstage to a common location
by Arthur Heymans
· 4 years, 9 months ago
fe481eb
northbridge/intel: Rename ram_calc.c to memmap.c
by Kyösti Mälkki
· 5 years ago
aba8fb1
intel/i945,gm45,pineview,x4x: Move stage cache support function
by Kyösti Mälkki
· 5 years ago
a402a9e
nb/intel/x4x: Put stage cache in TSEG
by Arthur Heymans
· 6 years ago
4ff675e
nb/intel/x4x: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
a2cc231
nb/intel/x4x: Rename a things that are not specific to DDR2
by Arthur Heymans
· 7 years ago
95c48cb
nb/intel/x4x: Implement both read and write training
by Arthur Heymans
· 7 years ago
0bf87de
nb/intel/x4x: Refactor setting default dll settings
by Arthur Heymans
· 7 years ago
6d7a8c1
nb/intel/x4x/raminit: Rework receive enable calibration
by Arthur Heymans
· 7 years ago
ef7e98a
nb/intel/x4x: Implement resume from S3 suspend
by Arthur Heymans
· 8 years ago
a090ae0
nb/intel/x4x: Add DMI/EP init
by Damien Zammit
· 8 years ago
4b513a6
northbridge/intel/x4x: Native raminit
by Damien Zammit
· 9 years ago
43a1f78
northbridge/intel/x4x: Intel 4-series northbridge support
by Damien Zammit
· 9 years ago