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review.coreboot.org / coreboot / d0b5164cd0980c078323792bd47c3aee6438e9b8 / src / soc / amd / cezanne / fsp_m_params.c
  1. d0b5164 soc/amd/cezanne: add downcoring and SMT disable settings to devicetree by Felix Held · 3 years, 4 months ago
  2. ea0f225 soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP by Matt Papageorge · 3 years, 5 months ago
  3. 5f5ca0c vc/amd/fsp/cezanne: update UPD headers by Matt Papageorge · 3 years, 5 months ago
  4. 2421de6 soc/amd/cezanne: factor out UPD-M configuration from romstage by Felix Held · 3 years, 5 months ago