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review.coreboot.org / coreboot / d086d51b5e550d65ad118db71d23c88429df3262
  1. d086d51 Keep cscope.out when distclean. by zbao · 12 years ago
  2. a860c68 Intel cpus: get MAXPHYADDR at runtime for new CAR by Kyösti Mälkki · 12 years ago
  3. 0078ceb Intel cpus: add hyper-threading CPU support to new CAR by Kyösti Mälkki · 12 years ago
  4. 05d6ffb Intel cpus: improve CPU compatibility of new CAR by Kyösti Mälkki · 12 years ago
  5. 7dfe32c Add support for RAM-less multi-processor init by Kyösti Mälkki · 12 years ago
  6. f9d1a42 Intel cpus: apply some good programming practices in new CAR by Kyösti Mälkki · 12 years ago
  7. 325b92f Intel cpus: cache actual size of the Flash ROM device by Kyösti Mälkki · 12 years ago
  8. 5a660ca Intel cpus: copy model_6ex CAR code by Kyösti Mälkki · 12 years ago
  9. d842f1f Makefile: rename romstage linking filenames by Kyösti Mälkki · 12 years ago
  10. a01ec14 Makefile: split romstage linking to separate rules by Kyösti Mälkki · 12 years ago
  11. 608d15b Fix coreboot makefiles not to produce half baked output. by Kyösti Mälkki · 12 years ago
  12. 5fdc00a Drop obsolete TINY_BOOTBLOCK by Kyösti Mälkki · 12 years ago
  13. a7b296d Fix warnings in coreboot utilities. by Stefan Reinauer · 12 years ago
  14. 8acbc2a use movsl for copying resume memory back by Stefan Reinauer · 12 years ago
  15. 77adc5e Don't unconditionally add support for cardbus and pci-x devices by Stefan Reinauer · 12 years ago
  16. dfb098d Add DEBUG_TPM option to Debugging menu by Stefan Reinauer · 12 years ago
  17. 7b67892 Make MTRR min hole alignment 64MB by Duncan Laurie · 12 years ago
  18. 527fc74 Fix MB calculation in the reporting of the MTRR hole by Duncan Laurie · 12 years ago
  19. 7389fa9 MTRR: add alternate allocation method for odd memory maps by Duncan Laurie · 12 years ago
  20. 67e6c2a Don't re-init EBDA in S3 resume path. by Duncan Laurie · 12 years ago
  21. b4aaaa7 Prepare the BIOS data areas before device init. by Duncan Laurie · 12 years ago
  22. 1d0b1d4 vga_io.c is not needed unless CONFIG_VGA is set by Stefan Reinauer · 12 years ago
  23. bb1177e Allow components smaller than declared size. by Vadim Bendebury · 12 years ago
  24. 8bb7723 Add Kconfig options to enable TSEG and set a size by Duncan Laurie · 12 years ago
  25. 689e31d Make cpuid functions usable when compiled with PIC by Duncan Laurie · 12 years ago
  26. 5d3438d Revamp cbmem.py to use the coreboot tables. by Gabe Black · 12 years ago
  27. 67aa3d6 drop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not needed by Stefan Reinauer · 12 years ago
  28. 5e02bc6 Make PCI CONF2 support a compile time option by Stefan Reinauer · 12 years ago
  29. bf729ba Add more timestamps in coreboot. by Stefan Reinauer · 12 years ago
  30. 10fea92 Fix coreboot makefiles not to produce half baked output. by Vadim Bendebury · 12 years ago
  31. cde7801 Add timestamps for selfboot and acpi wake by Duncan Laurie · 12 years ago
  32. c668af7 Make TPM driver work in rom stage. by Stefan Reinauer · 12 years ago
  33. 3008bbad Add TPM support to coreboot by Stefan Reinauer · 12 years ago
  34. b89a761 Add Google ChromeOS vendorcode directory by Stefan Reinauer · 12 years ago
  35. 00093a8 Add an option to keep the ROM cached after romstage by Stefan Reinauer · 12 years ago
  36. 1afe51a Add native memset() function on x86 by Stefan Reinauer · 12 years ago
  37. 0054afa Add faster, architecture dependent memcpy() by Stefan Reinauer · 12 years ago
  38. 19e7e7d Add infrastructure for global data in the CAR phase of boot by Gabe Black · 12 years ago
  39. 4d04a71 Detect whether the OXPCIE card is really present while in the ROM stage. by Gabe Black · 12 years ago
  40. 1b632af Fix typos in src/console/Kconfig by Stefan Reinauer · 12 years ago
  41. 90dcdd4 Add support for enabling PCIe Common Clock and ASPM by Duncan Laurie · 12 years ago
  42. 22c0468 Refactor publishing CBMEM addresses through coreboot table. by Vadim Bendebury · 12 years ago
  43. 2e43867 Add timestamp table pointer to the coreboot table. by Vadim Bendebury · 12 years ago
  44. b93f74b Introduce utility for parsing CBMEM contents. by Vadim Bendebury · 12 years ago
  45. 3e31600 CBMEM CONSOLE: Enable coreboot CBMEM console. by Vadim Bendebury · 12 years ago
  46. 1078c67 CBMEM CONSOLE: Add code using the new console driver. by Vadim Bendebury · 12 years ago
  47. be25a4d CBMEM CONSOLE: Add CBMEM type for console buffer. by Vadim Bendebury · 12 years ago
  48. 32da8be CBMEM CONSOLE: Add CBMEM console driver implementation. by Vadim Bendebury · 12 years ago
  49. c34b463 CBMEM CONSOLE: Add config option for CBMEM stored console log. by Vadim Bendebury · 12 years ago
  50. f2f9386 Increase CBMEM to accommodate larger console. by Vadim Bendebury · 12 years ago
  51. 654f293 Add cmos helper functions for reading/writing a dword by Duncan Laurie · 12 years ago
  52. 9ec8ed8 selfboot: Allow loading SeaBIOS into a reserved region in the lower 1MB by Stefan Reinauer · 12 years ago
  53. e246b31 Include arch/acpi.h instead of manually adding acpi_slp_type. by Stefan Reinauer · 12 years ago
  54. 6f72d69 Add timestamp collecting to coreboot. by Vadim Bendebury · 12 years ago
  55. 9202473d Add a config flag to enable time stamp collection by Vadim Bendebury · 12 years ago
  56. e186060 Initialize CBMEM early. by Vadim Bendebury · 12 years ago
  57. e6b6aff Introduce config option to initialize CBMEM early. by Vadim Bendebury · 12 years ago
  58. c9da015 Add bifferboard by Rudolf Marek · 12 years ago
  59. ae012486 Add 64KB romchip chip size by Rudolf Marek · 12 years ago
  60. 6b89b4c Add support for RDC R8610 Southbridge by Rudolf Marek · 12 years ago
  61. c0c5ac7 Add the support for RDC R8610 Northbridge by Rudolf Marek · 12 years ago
  62. 1c89e90 Add RDC R8610 PCI IDs. by Rudolf Marek · 12 years ago
  63. 1dd0dda Fix cleaning SeaBIOS from coreboot makefile by Marc Jones · 12 years ago
  64. 6588802 Disable the GDB stub by default by Rudolf Marek · 12 years ago
  65. a01ae62 Fix possible deadlock on SMP stop_this_cpu by Kyösti Mälkki · 12 years ago
  66. 8b28d50 Intel cpus: Fix deadlock on hyper-threading init by Kyösti Mälkki · 12 years ago
  67. 2172f61 Makefile: rename linker intermediate variable by Kyösti Mälkki · 12 years ago
  68. c0ea543 gitconfig: Improve commit-msg hook by Patrick Georgi · 12 years ago
  69. e77b9a0 Replace ramtest pattern to assist in DIMM configuration by Kyösti Mälkki · 12 years ago
  70. 8a85bcc i82801gx: Support power-on-after-power-fail better by Patrick Georgi · 12 years ago
  71. c07466b i82801gx: Use CMOS variable if available for power-on on power failure by Patrick Georgi · 12 years ago
  72. 5161509 printf: Remove some L modifier uses by Patrick Georgi · 12 years ago
  73. ccee625 Fix libpayload alloc() size and gcc pointer optimization problems. by Marc Jones · 12 years ago
  74. 06253cd Avoid using CPUID in SMBIOS tables. Check for CPUID otherwise claim 486 class cpu. by Rudolf Marek · 12 years ago
  75. 06c0429 Another indirection for normal/fallback bootblock by Patrick Georgi · 12 years ago
  76. 7a39446 Intel cpus: Include CAR from socket by Kyösti Mälkki · 12 years ago
  77. dd3b227 Fix AMD Fam15 CBMEM allocation by Stefan Reinauer · 12 years ago
  78. 30b46ce Fix AMD Fam12 CBMEM allocation by Stefan Reinauer · 12 years ago
  79. cc6c615 Fix AMD Fam10 CBMEM allocation by Stefan Reinauer · 12 years ago
  80. 3ae1c65 AMD Agesa: delete no-op bootblock files by Kyösti Mälkki · 12 years ago
  81. d11ca1d Rename AMD_AGESA to CPU_AMD_AGESA by Kyösti Mälkki · 12 years ago
  82. f5bb477 Fix AMD Agesa leaking Kconfig by Kyösti Mälkki · 12 years ago
  83. 1c93d90 ROMCC boards have no XIP limit by Patrick Georgi · 12 years ago
  84. b58651b Use search path when building dependencies by Patrick Georgi · 12 years ago
  85. 1a34165 xchg is atomic with side-effects by Patrick Georgi · 12 years ago
  86. fe9210f clang: Don't use mmx nor sse by Patrick Georgi · 12 years ago
  87. eb5e28f Intel northbridge I945: Apply un-written naming rules by Kyösti Mälkki · 12 years ago
  88. d4d5e4d Via Epia-N and C3: Set ioapic delivery type in Kconfig by Patrick Georgi · 12 years ago
  89. 35e1c86 VIA southbridge K8T890: Apply un-written naming rules by Kyösti Mälkki · 12 years ago
  90. 7863015 Fix address of IDT in real-mode entry by Kyösti Mälkki · 12 years ago
  91. 5750ed2 Fix AMD Fam14 cbmen allocation by Marc Jones · 12 years ago
  92. 8d59569 Clean up whitespace in fam14 northbridge.c by Marc Jones · 12 years ago
  93. 02bb578 Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available by Gabe Black · 12 years ago
  94. 0f995bc AGESA family 12 changes to fix torpedo warnings by Martin Roth · 12 years ago
  95. 5efe10a Union Station: Fixes to turn on HDMI by Frank Vibrans · 12 years ago
  96. 2fc955e Union Station: Remove SIO support by Frank Vibrans · 12 years ago
  97. 30cc480 No need to setup include paths with .s files by Patrick Georgi · 12 years ago
  98. fb5026c malloc: size is unsigned, don't test for size < 0 by Patrick Georgi · 12 years ago
  99. 0c24537 mainboard/aopen/Kconfig: remove extra whitespace by Patrick Georgi · 12 years ago
  100. c040e476 Portability improvement by Patrick Georgi · 12 years ago