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review.coreboot.org / coreboot / cd49cce7b70e80b4acc49b56bb2bb94370b4d867 / src / arch / x86 / bootblock_crt0.S
  1. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  2. 87efe24 soc/intel/quark: Drop BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP by Kyösti Mälkki · 6 years ago
  3. 2030d25 arch/x86: Support "weak" BIST and timestamp save routines by Lee Leahy · 8 years ago
  4. fdc8c8b arch/x86: Add debug spinloop by Lee Leahy · 8 years ago
  5. 3892597 arch/x86: Enable SSE in bootblock_crt0.S by Lee Leahy · 8 years ago
  6. b3ee03c bootblock_crt0: Use CR* macros from cpu/x86/cr.h by Furquan Shaikh · 8 years ago
  7. cfc80c2 arch/x86: Add second paragraph to license header by Martin Roth · 9 years ago
  8. 6be6c8f arch/x86: Implement minimal bootblock for C_ENVIRONMENT_BOTOBLOCK by Alexandru Gagniuc · 9 years ago