1. a2c951e Clean up whitespace and comments style. (trivial) by Marc Jones · 16 years ago
  2. 87c938f adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot" by Stefan Reinauer · 16 years ago
  3. 6852406 Go back to SIPI WAIT state for those CPUS defining the newly introduced by Stefan Reinauer · 16 years ago
  4. a56edac This patch by Stefan Reinauer · 16 years ago
  5. 5a522d4 match against all steppings of a CPU model, because these are _model_ drivers. by Stefan Reinauer · 16 years ago
  6. 57d2af8 same spelling in all mtrr output.. (trivial) by Stefan Reinauer · 16 years ago
  7. df6c858 drop unused code (trivial) by Stefan Reinauer · 16 years ago
  8. 35b5361 Add AMD Fam10 B3 default settings to match AMD example code. by Marc Jones · 16 years ago
  9. 51737cf Update to the latest AMD Fam10 microcode patches. by Marc Jones · 16 years ago
  10. 2df2915 Add Fam10 Gart table walk enable for MCA reporting to match AMD example code. by Marc Jones · 16 years ago
  11. 049814c Add missing Intel CPU (trivial). by Uwe Hermann · 16 years ago
  12. 65e0804 Remove inline from FAM10 CPU initialization functions. by Marc Jones · 16 years ago
  13. c1cbff2 Add CPUID processor name string support for Fam10 CPUs. by Marc Jones · 16 years ago
  14. 403b89a On APs the ClLinesToNbDis was being left enabled from CAR setup. by Marc Jones · 16 years ago
  15. a74a8ff Clean up and remove late initialization code that is no longer needed. by Marc Jones · 16 years ago
  16. f0174b5 Find matching settings for each CPUs FID, VID, and P-state registers and initialize them. by Marc Jones · 16 years ago
  17. 8127dc4 Update the FAM10 microcode to current versions. by Marc Jones · 16 years ago
  18. c74e362 Missed this file in the previous check-in, r3248. by Marc Jones · 16 years ago
  19. da4ce6b Add early MSR and PCI register initialization. by Marc Jones · 16 years ago
  20. 78f59f8 Re-add files I deleted by mistake in r3219. They are meant for a different by Marc Jones (marc.jones · 16 years ago
  21. df22f78 Don't check exclusive IRQ fieldin the PIR table. by Marc Jones(marc.jones · 16 years ago
  22. 4afb7fb Add a workaround for a bug in some binutils version which strictly by Carl-Daniel Hailfinger · 16 years ago
  23. cfcc9ca * split model_centaur into model_c3 and model_c7 by Stefan Reinauer · 16 years ago
  24. 3182122 Update AMD CPU list based on Revision Guide for AMD NPT Family 0Fh Processors, by Uwe Hermann · 16 years ago
  25. b681570 Formatting fixes, no content changes (trivial). by Uwe Hermann · 16 years ago
  26. b8c2aa2 by Myles Watson · 16 years ago
  27. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 16 years ago
  28. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 16 years ago
  29. aeea7c1 Via C3 datasheets don't make any mention of microcode updates, and the by Corey Osgood · 16 years ago
  30. ed8dc58 Add a workaround for a bug in some binutils version which strictly by Carl-Daniel Hailfinger · 16 years ago
  31. 1923fc4 This patch introduces 4k CAR size granularity for the AMD x86 CAR code. by Carl-Daniel Hailfinger · 16 years ago
  32. 188288a Fix compilation of Tyan S2735 which was broken by accident in r3038. by Carl-Daniel Hailfinger · 16 years ago
  33. f2ecb74 Remove some DOS line endings accidentially introduced in r3014. by Carl-Daniel Hailfinger · 16 years ago
  34. 4d1aa0a This patch is an attempt at introducing 4k CAR size granularity for the by Carl-Daniel Hailfinger · 16 years ago
  35. 8ae8c88 Initial AMD Barcelona support for rev Bx. by Marc Jones · 17 years ago
  36. 2006b38 Whitespace and other code cleanup in peperation for AMD Barcelona support. by Marc Jones · 17 years ago
  37. 8708c1b Update AMD CPU IDs in model_fxx_init.c with information from by Uwe Hermann · 17 years ago
  38. c9f8a67 This patch adds the pci ids of c7 cpus to the existing model_centaur. c3 by Corey Osgood · 17 years ago
  39. a0181ea Use the preferred order of 'static const' instead of 'const static'. by Uwe Hermann · 17 years ago
  40. 65bc460 This code gets us to a working linux boot on the alix1c. I have not tested by Ronald G. Minnich · 17 years ago
  41. 124e4a4 analog changes for the cpu_driver structures... by Stefan Reinauer · 17 years ago
  42. f1cf1f7 Ever wondered where those "setting incorrect section attributes for by Stefan Reinauer · 17 years ago
  43. 0dff6e3 fix a whole bunch of warnings. (trivial) by Stefan Reinauer · 17 years ago
  44. 8b83836 Add support for the Intel mFCPGA 478 socket. (trivial) by Stefan Reinauer · 17 years ago
  45. cb56d21 Put the print in the right place. This is trivial patch but a very by Ronald G. Minnich · 17 years ago
  46. a3e0387 This patch adds support for the Mobile Intel Celeron CPU (Micro-FC-BGA) by Joseph Smith · 17 years ago
  47. 2109010 Add support for the Athlon64 x2 5000+ CPU. by Torsten Duwe · 17 years ago
  48. e99bd10 This patch adds support for the Intel i82810 northbridge and various i82801xx by Corey Osgood · 17 years ago
  49. a5599c1 Use the common LinuxBIOS license header format. by Uwe Hermann · 17 years ago
  50. 4834a4f This patch fixes the processor name string for Rev F. CPUs. by Sven Kapferer · 17 years ago
  51. 344e457 Add missing license headers, minor cosmetic fixes in existing headers. by Uwe Hermann · 17 years ago
  52. 7f4040a Add additional CPU device ID: by Jeremy Jackson · 17 years ago
  53. ddf845f This patch cleans up and clarifies Geode source code comments. by Marc Jones · 17 years ago
  54. 00dc859 indent is by no means as harmless as one might think ;-) trivial fix. by Stefan Reinauer · 17 years ago
  55. 9934b81 Fix the indent and whitespace to match LinuxBIOS standards by Jordan Crouse · 17 years ago
  56. fa6c11e This is the final patch to enable the msm800sev to build. This patch by Ronald G. Minnich · 17 years ago
  57. bc8176c This patch adds support for the AMD Geode LX CPU. (rediffed) by Marc Jones · 17 years ago
  58. 6818245 Add missing license headers to some Geode LX related files. by Jordan Crouse · 17 years ago
  59. cdc5cc6 trivial: fix filename in comment. by Stefan Reinauer · 17 years ago
  60. 21332b8 This is part of the outstanding mcp55 commit from January 18th. It will by Yinghai Lu · 17 years ago
  61. d57241f This is (most of) the usb2 debug console code ripped out of by Yinghai Lu · 17 years ago
  62. 9620651 Change 'ram' to 'RAM' in user-visible output (closes #60). by Uwe Hermann · 17 years ago
  63. a522df0 Add mtrr support for pentium m cpus by Jon Dufresne · 18 years ago
  64. 218e7ed Use the common LinuxBIOS license header (trivial). Refs #5. by Uwe Hermann · 18 years ago
  65. a7aa29b Use the canonical name of the vendors/devices and the by Uwe Hermann · 18 years ago
  66. 5f9624d CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support in serengeti_cheeatah by Yinghai Lu · 18 years ago
  67. 15b8ea7 socket 939 by Yinghai Lu · 18 years ago
  68. d4b278c AMD Rev F support by Yinghai Lu · 18 years ago
  69. 7d94412 changes for the lx and artecgroup mobo by Indrek Kruusa · 18 years ago
  70. 9cf642b fix for qemu northbridge, from Ed Swierk Signed-off-by: Ronald G. Minnich by Ronald G. Minnich · 18 years ago
  71. 157e1ab share decompression code. by Stefan Reinauer · 18 years ago
  72. 8e34641 Changelog: by Indrek Kruusa · 18 years ago
  73. 5eca348 Add newer Via Nehemiah stepping levels. by Jonathan McDowell · 18 years ago
  74. f4c0b59 Geode LX: this patch adds configuration/status/self-test MSR definitions by Indrek Kruusa · 18 years ago
  75. 5e9dc23 This patch adds support for the AMD LX cpu. by Ron Minnich · 18 years ago
  76. cb8eab4 add framework for i440bx chipset by Richard Smith · 18 years ago
  77. 9d0b30d Fixes from AMD. Tested to build on rumba and olpc, and builds. by Ronald G. Minnich · 18 years ago
  78. 3951027 * delete two empty files * commit SMM lock code. by Stefan Reinauer · 18 years ago
  79. 6ab0fa9 add k8 processor name handling as required by the k8 revision guide. by Stefan Reinauer · 18 years ago
  80. fd14d44 remove erroneous cache disable. by Ronald G. Minnich · 18 years ago
  81. fb93749 changes from AMD for making OLPC video work. by Ronald G. Minnich · 18 years ago
  82. 890ee09 further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB. by Ronald G. Minnich · 18 years ago
  83. b5fcfdb add DK8HTX support. by Ronald G. Minnich · 18 years ago
  84. 9a8e36d init the ECC for BSP and AP at the same time. So reduce init cpus time by Yinghai Lu · 18 years ago
  85. bad9d10 cleanup some of the compressed rom stream ugliness -- more to do! by Ronald G. Minnich · 18 years ago
  86. 49a89f1 Use a real variable to configure rom base for vsa ... by Ronald G. Minnich · 18 years ago
  87. ab4f5d0 fix the tree by Stefan Reinauer · 18 years ago
  88. 52377de core range and set_init_ram_access by Yinghai Lu · 18 years ago
  89. b73fd56 rm unused file by Yinghai Lu · 18 years ago
  90. 608d4b2 merge zrom to rom_stream and print olen ilen by Yinghai Lu · 18 years ago
  91. 4c47532 oops! Slap me on the head for this one. Quick fix for ward until by Stefan Reinauer · 18 years ago
  92. ead7368 add automatic payload compression method to LinuxBIOS by Stefan Reinauer · 18 years ago
  93. d3ba4aa Fall back to pre-broken settings and setup for GX2. by Ronald G. Minnich · 18 years ago
  94. c1a4b2b by Li-Ta Lo · 18 years ago
  95. 05c0869 boot to kernel by Li-Ta Lo · 18 years ago
  96. ea9db56 add SystemPreInit() and support by Ronald G. Minnich · 18 years ago
  97. d8d8fff minor modification by Li-Ta Lo · 18 years ago
  98. 45f6c5e add cpureginit to romcc code. by Ronald G. Minnich · 18 years ago
  99. 526b2c4 clean up gx2def.h a bit. by Ronald G. Minnich · 18 years ago
  100. 44f72eb add bug support for 2.1 by Ronald G. Minnich · 18 years ago