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review.coreboot.org / coreboot / c8a695550f819b8c61c8f8a13d622402ef684f99 / src / soc / intel / cannonlake
  1. 5ee4c12 soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default value by Subrata Banik · 5 years ago
  2. 65f03b7 soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H by Jeremy Soller · 5 years ago
  3. 903b40a soc/intel: Replace uses of dev_find_slot() by Kyösti Mälkki · 5 years ago
  4. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  5. 7803e48 soc/intel/cannonlake: Add support to log XHCI wake events by Paul Fagerburg · 5 years ago
  6. a449290 Use 3rdparty/intel-microcode by Arthur Heymans · 5 years ago
  7. 85d3b40 soc/intel/cannonlake: fix use of legacy 8254 timer by Matt DeVillier · 5 years ago
  8. c8db633 soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNONLAKE by Arthur Heymans · 5 years ago
  9. 1a86cda soc/intel: Provide SPD manufacturer ID and module type to SMBIOS by Duncan Laurie · 5 years ago
  10. 4821a0e soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE by Arthur Heymans · 5 years ago
  11. a0368a0 soc/intel/{cml, whl}: Add option to skip HECI disable in SMM by Subrata Banik · 5 years ago
  12. 2973d1e vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155 by Aamir Bohra · 5 years ago
  13. 3c8c81b soc/intel/cannonlake: Add _DSM method for SD controller by V Sowmya · 5 years ago
  14. f972322 src/soc/intel/common/smbios: Add addtional infos to dimm_info by Christian Walter · 5 years ago
  15. b2709ae soc/intel/cannonlake: Do not read SPD again if index hasn't changed by Furquan Shaikh · 5 years ago
  16. 9995418 soc/intel: Replace UART_BASE() and friends with a Kconfig by Nico Huber · 5 years ago
  17. 10ed868 soc/intel/{skl,cnl,icl}: Drop soc_uart_set_legacy_mode() by Nico Huber · 5 years ago
  18. 27d02d8 src/soc: Add missing 'include <types.h>' by Elyes HAOUAS · 5 years ago
  19. 9637856 soc/intel/cannonlake: Dump ME status info before notify EndOfFirmware by Bora Guvendik · 5 years ago
  20. 15588b0 post_code: add post code for hardware initialization failure by Keith Short · 5 years ago
  21. d93531b soc/intel/cannonlake: Dump ME f/w version and status information by Tim Wawrzynczak · 5 years ago
  22. f91344c soc/intel: Remove unused pointer argument in mca_configure() by Subrata Banik · 5 years ago
  23. ddbf2c4 soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD. by Tim Wawrzynczak · 5 years ago
  24. 76a8f9e soc/intel/cannonlake: Make use of gpio_pm_configure() by Subrata Banik · 5 years ago
  25. 46340d0 soc/intel: Fill DIMM serial number from SPD by Duncan Laurie · 5 years ago
  26. 0d4200f soc/intel/cannonlake: Support different SPD read type for each slot by Philip Chen · 5 years ago
  27. 8dd5189 soc/intel/{cannonlake,icelake}: Drop unused cbmem.c file by Elyes HAOUAS · 5 years ago
  28. 1159a16 soc/intel/cnl: Enable VT-d by John Zhao · 5 years ago
  29. d5d89c8 soc/intel/cannonlake: Fix pcie clock number by Lijian Zhao · 5 years ago
  30. d694f6e mb/google/sarien: Add SMBIOS type 9 fields by Lijian Zhao · 5 years ago
  31. 7f1e9db soc/intel/cannonlake/acpi: Add board level s0ix call back by Eric Lai · 5 years ago
  32. 939440c soc/intel/cannonlake: Add GPIO dual-route support. by Tim Wawrzynczak · 5 years ago
  33. 43a3c51 mb/google/sarien: Disable S5 wake on LAN by default by Eric Lai · 5 years ago
  34. 6672bd8 vboot: refactor OPROM code by Joel Kitching · 5 years ago
  35. c126084 soc/intel: Add GPI interrupt config register offset info by Karthikeyan Ramasubramanian · 5 years ago
  36. cb42f4d soc/intel/cannonlake: Modify dq_map to provide for 6 entries by Paul Fagerburg · 5 years ago
  37. c338507 soc/{amd,intel}/chip: Use local include for chip.h by Elyes HAOUAS · 5 years ago
  38. 73b0136 3rdparty/fsp: Update submodule pointer to upstream master by Matt DeVillier · 5 years ago
  39. 39c3d39 soc/intel/cannonlake: add missing console.h include by Patrick Georgi · 5 years ago
  40. 3717256 soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig by Kane Chen · 5 years ago
  41. 78fbe3d soc/intel/cannonlake: Add null reference check for Cnvi and Xdci by Aamir Bohra · 5 years ago
  42. cd4fe0f src: include <assert.h> when appropriate by Elyes HAOUAS · 5 years ago
  43. 20eaef0 src: Add missing include 'console.h' by Elyes HAOUAS · 5 years ago
  44. 7f1a0e6 Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML" by Lijian Zhao · 5 years ago
  45. 395f1e3 soc/intel/cannonlake: Add report for iGD 0x3ea1 by Lijian Zhao · 5 years ago
  46. db3f0e3 soc/intel/cnl: Generate DMAR ACPI table by John Zhao · 5 years ago
  47. 250dfc0 soc/intel/cannonlake: Configure Vmx support using Kconfig by Ronak Kanabar · 5 years ago
  48. a432f38 soc/intel/cannonlake: Implement soc side VMX support by Ronak Kanabar · 5 years ago
  49. 41dad28 soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML by Subrata Banik · 5 years ago
  50. 6d56916 soc/intel/cpulib: Remove redundent enable/disable functions by Subrata Banik · 5 years ago
  51. cef9879 soc/intel/cannonlake: Select FSP_M_XIP by Furquan Shaikh · 5 years ago
  52. 09b01de soc/intel/cannonlake: Do not use XIP_ROM_SIZE by Furquan Shaikh · 5 years ago
  53. e05fe31 soc/intel/cannonlake: Correct the GPE DWx mapping for GPIO groups by Aamir Bohra · 5 years ago
  54. 1dde7cc Replace remaining IS_ENABLED(CONFIG_*) with CONFIG() by Nico Huber · 5 years ago
  55. 84743a1 src/soc/intel/cannonlake: Remove ITSS IPC restore by Aamir Bohra · 5 years ago
  56. bf0970e src: Use include <delay.h> when appropriate by Elyes HAOUAS · 5 years ago
  57. add76f9 src: Use #include <timer.h> when appropriate by Elyes HAOUAS · 5 years ago
  58. dffa8d0 soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree by Krishna Prasad Bhat · 5 years ago
  59. 009e6cb soc/intel/cannonlake: Ignore GBE LTR by Lijian Zhao · 5 years ago
  60. 68890b9 soc/intel/cannonlake: Update CPU Ratio base on MSR by Lijian Zhao · 5 years ago
  61. 9bc9da9d soc/intel/cannonlake: Configure voltage margining policies by Krzysztof Sywula · 5 years ago
  62. 2de1903 soc/intel/cannonlake: Clear PMCON status bits by Krishna Prasad Bhat · 5 years ago
  63. cf32fd1 soc/intel/common: Remove common chip config use_fsp_mp_init by Subrata Banik · 6 years ago
  64. 42a66fb soc/intel/cannonlake: Enable power button smi in pre-OS by Krzysztof Sywula · 5 years ago
  65. caa85f2 soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI ports by Krishna Prasad Bhat · 5 years ago
  66. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  67. 4dfd8d6 soc/intel/cannonlake: Fix return values for get_param_value by Furquan Shaikh · 5 years ago
  68. bfe4a59 soc/intel/cannonlake: Pass coreboot debug interface info to FSP by Maulik V Vaghela · 5 years ago
  69. 41483c9 soc/intel/cannonlake: Add required FSP UPD changes for CML by Subrata Banik · 6 years ago
  70. 74aa99a src: Drop unused '#include <halt.h>' by Elyes HAOUAS · 5 years ago
  71. 6e401cf soc/intel/cannonlake: Fix GEN_PMCON bit checks by Furquan Shaikh · 5 years ago
  72. 5c19009 soc/intel/cannonlake: Allow mainboard to override DRAM part number by Furquan Shaikh · 5 years ago
  73. 31f9631 src: Drop unused 'include <arch/acpigen.h>' by Elyes HAOUAS · 5 years ago
  74. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  75. 91b027a soc/intel/cannonlake: Add support for logging wake source in SMM by V Sowmya · 5 years ago
  76. 5fe77af soc/intel/cannonlake: Move power_state functions to pmutil.c by V Sowmya · 5 years ago
  77. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  78. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  79. e0a0c63 soc/intel/cannonlake: Move common definitions to a header file by Rizwan Qureshi · 5 years ago
  80. 088d2a3 soc/intel/cnl/acpi: add ish ACPI device by Jett Rink · 5 years ago
  81. 59e5c80 soc/intel/cannonlake: Fix DSDT compile remarks by Lijian Zhao · 5 years ago
  82. 8ee161d arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv field by Elyes HAOUAS · 5 years ago
  83. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  84. fa011db soc/intel/cannonlake: Add CometLake SoC support by Subrata Banik · 6 years ago
  85. 67a489f soc/intel/cannonlake: Disable ACPI mode on BS_DEV_INIT exit by Furquan Shaikh · 5 years ago
  86. db9e9ac soc/intel/cannonlake: Add PCH series check for CML LP PCH by Maulik V Vaghela · 6 years ago
  87. ba8af58 soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device ID by Subrata Banik · 5 years ago
  88. 8aadab7 soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN# by Rizwan Qureshi · 6 years ago
  89. e64c25c soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers by Rizwan Qureshi · 5 years ago
  90. ac8c60e soc/intel/cannonlake: Disable ACPI mode as part of pmc_soc_init by Furquan Shaikh · 5 years ago
  91. 7471540 soc/intel/cannonlake: Update GPIO definitions for Virtual GPIO by Rizwan Qureshi · 5 years ago
  92. da7ffb48 soc/intel/common: Include cometlake PCH IDs by Ronak Kanabar · 6 years ago
  93. f606a2f soc/intel/common: Include cometlake SA IDs by Ronak Kanabar · 6 years ago
  94. 128bb2a soc/intel/common: Include cometlake CPU IDs by Ronak Kanabar · 6 years ago
  95. ab9f64d soc/intel/cannonlake: Make few more whitespace proper in MCH name by Subrata Banik · 5 years ago
  96. 4185de5 soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from devicetree by Jeremy Soller · 5 years ago
  97. eb50329 soc/intel/cannonlake: Add ASL function for setting pad mode by Rizwan Qureshi · 6 years ago
  98. d1dfba4 soc/intel/cannonlake: Add whitespace proper in CPU/MCH/IGD name by Subrata Banik · 5 years ago
  99. 69a9565 soc/intel/cannonlake: SoC specific microcode update check by Ronak Kanabar · 5 years ago
  100. 3cce7a0 soc/intel/cannonlake: Add field to identify single channel memory by Shelley Chen · 6 years ago