- 29e71b1 broadwell: Move some MRC/refcode settings to devicetree by Angel Pons · 3 years, 2 months ago
- af4bd56 sb/intel: Use `bool` for PCIe coalescing option by Angel Pons · 2 years, 8 months ago
- 739a6ad1 mb/google/auron: Use Haswell CPU code by Angel Pons · 3 years, 10 months ago
- 97e21d3 nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings by Michael Niewöhner · 3 years, 8 months ago
- 44fa0d4 soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation by Michael Niewöhner · 3 years, 8 months ago
- 3cc2c38 soc/intel/broadwell: Separate PCH in devicetree by Angel Pons · 3 years, 10 months ago
- d79b87a mb/google/auron: Add SATA PCI device to overridetree by Angel Pons · 3 years, 10 months ago
- 99af210 mb/google/auron: Prepare devicetree for PCH split by Angel Pons · 3 years, 10 months ago
- f8d4745 soc/intel/broadwell: Drop `gpu_panel_port_select` by Angel Pons · 4 years ago
- ae01122 mb/google/auron: Convert variants to use override devicetree by Matt DeVillier · 4 years, 5 months ago