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review.coreboot.org / coreboot / c86fc8e63d81251a5da80ed55e4fbc9900a900d9 / src / southbridge / intel / bd82x6x / me_8.x.c
  1. c86fc8e sb,soc/intel: Reduce preprocessor use with ME debugging by Kyösti Mälkki · 4 years, 10 months ago
  2. ff744bf src/southbridge: change "unsigned" to "unsigned int" by Martin Roth · 4 years, 10 months ago
  3. 4a0f071 {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() by Subrata Banik · 5 years ago
  4. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  5. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  6. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  7. ead574e src: Get rid of duplicated includes by Elyes HAOUAS · 6 years ago
  8. dc03528 sb/intel/bd82x6x: Don't use device_t by Elyes HAOUAS · 6 years ago
  9. 58a8953 Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" by Arthur Heymans · 6 years ago
  10. 448d9fb src: Use "foo *bar" instead of "foo* bar" by Elyes HAOUAS · 6 years ago
  11. f9de5a4 src/southbridge: Add required space before the open parenthesis by Elyes HAOUAS · 6 years ago
  12. d2d2aef sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location by Arthur Heymans · 7 years ago
  13. 7a1a3ad southbridge/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  14. b4a45dc intel PCI ops: Remove explicit PCI MMCONF access by Kyösti Mälkki · 11 years ago
  15. ba28e8d src/southbridge: Code formating by Elyes HAOUAS · 8 years ago
  16. 0325dc6 bootmode: Get rid of CONFIG_BOOTMODE_STRAPS by Furquan Shaikh · 8 years ago
  17. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  18. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  19. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  20. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  21. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  22. 152e517 southbridge/intel/bd82x6x/me_8.x.c: Trivial - space to tab fix by Edward O'Callaghan · 10 years ago
  23. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  24. afc8d98 intel/bd82x6x: Skip unknown MBP. by Vladimir Serbinenko · 10 years ago
  25. fd98c65 intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  26. 54d6abd Drop some duplicates of PCI-e config functions by Kyösti Mälkki · 11 years ago
  27. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  28. 5c88c6f elog: add extended management engine event by Duncan Laurie · 12 years ago
  29. c1c9435 Log event for abnormal management engine status by Duncan Laurie · 12 years ago
  30. 708f731 ME: Move ME v8 lockdown to finalize step by Duncan Laurie · 12 years ago
  31. 998f3a2 Cougar/Panther Point: Compile in ME7 and ME8 code at the same time by Stefan Reinauer · 12 years ago
  32. 49058c0 Fix ME hash functions on Panther Point/Cougar Point by Stefan Reinauer · 12 years ago
  33. 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago