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review.coreboot.org / coreboot / c826ba419f06f9df9cded8e60633253ddc7b60ff / src / northbridge / intel / sandybridge / raminit_native.c
  1. c826ba4 commonlib/clamp.h: Relicense file to be BSD-compatible by Angel Pons · 1 year, 11 months ago
  2. 66780a0 nb/intel/sandybridge: Use new fixed BAR accessors by Angel Pons · 3 years, 4 months ago
  3. d992944 nb/intel/sandybridge: Clean up `dram_timing` function by Angel Pons · 3 years, 10 months ago
  4. 0a20872 nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400 by Angel Pons · 3 years, 10 months ago
  5. fe276fb nb/intel/sandybridge: Clean up `dram_freq` function by Angel Pons · 3 years, 10 months ago
  6. 47a80a0 nb/intel/sandybridge: Move steppings to CPU header by Angel Pons · 3 years, 7 months ago
  7. 5db1b15 nb/intel/sandybridge: Rewrite constant values by Angel Pons · 3 years, 7 months ago
  8. c8ac2cc nb/intel/sandybridge: Rename I/O data timings by Angel Pons · 3 years, 8 months ago
  9. 4f86d63 nb/intel/sandybridge: Clean up COMPOFST1 logic by Angel Pons · 3 years, 8 months ago
  10. 2921cbf nb/intel/sandybridge: Correct get_COMP2 function by Angel Pons · 3 years, 8 months ago
  11. 2a7d752 nb/intel/sandybridge: Rename and refactor `discover_timC_write` by Angel Pons · 3 years, 8 months ago
  12. 08f749d nb/intel/sandybridge: Rename and clean up `discover_edges_write` by Angel Pons · 3 years, 8 months ago
  13. 068c259 nb/intel/sandybridge: Run `read_mpr_training` before write training by Angel Pons · 3 years, 8 months ago
  14. 7f5a97c nb/intel/sandybridge: Rename `read_training` function by Angel Pons · 3 years, 8 months ago
  15. 4c79f93 nb/intel/sandybridge: Rename `discover_edges` functions by Angel Pons · 3 years, 8 months ago
  16. 7190201 nb/intel/sandybridge: Drop write_controller_mr() function by Angel Pons · 3 years, 8 months ago
  17. 2f3cc00 nb/intel/sandybridge: Reduce the scope of get_CWL() by Angel Pons · 3 years, 8 months ago
  18. dddd1cc src/northbridge: Drop unneeded empty lines by Elyes HAOUAS · 3 years, 11 months ago
  19. d058131 nb/intel/sandybridge/raminit: Add ECC debug code by Patrick Rudolph · 4 years, 3 months ago
  20. 1d6484a nb/intel/sandybridge: Add missing includes by Elyes HAOUAS · 4 years ago
  21. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  22. fc93024 nb/intel/sandybridge: Refactor get_mem_min_tck by Angel Pons · 4 years, 4 months ago
  23. dd66287 nb/intel/sandybridge/raminit: Add ECC support by Patrick Rudolph · 7 years ago
  24. a38fee3 nb/intel/sandybridge: Rename raminit_ivy.c by Angel Pons · 4 years, 4 months ago[Renamed from src/northbridge/intel/sandybridge/raminit_ivy.c]
  25. efbed26 nb/intel/sandybridge: Unify the code paths by Angel Pons · 4 years, 4 months ago
  26. 29f391ec nb/intel/sandybridge: Add print for PLL_REF100_CFG by Angel Pons · 4 years, 4 months ago
  27. a6c8b4b nb/intel/sandybridge: Rewrite get_FRQ by Angel Pons · 4 years, 4 months ago
  28. 48409b8 nb/intel/sandybridge: Cache FRQ index by Angel Pons · 4 years, 4 months ago
  29. df09bdb nb/intel/sandybridge: Rewrite table accessors by Angel Pons · 4 years, 4 months ago
  30. 825332d nb/intel/sandybridge: Factor out timing tables by Angel Pons · 4 years, 4 months ago
  31. 6e5aabd nb/intel/sandybridge: Use SPDX headers by Angel Pons · 4 years, 4 months ago
  32. 89ae6b8 nb/intel/sandybridge: Use cached CPUID by Angel Pons · 4 years, 4 months ago
  33. 7c49cb8 nb/intel/sandybridge: Tidy up code and comments by Angel Pons · 4 years, 4 months ago
  34. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  35. 8852188 nb/intel/sandybridge: Add a bunch of MCHBAR defines by Angel Pons · 4 years, 6 months ago
  36. 1aba2a3 nb/intel/sandybridge: Make MCHBAR arithmetics consistent by Angel Pons · 4 years, 6 months ago
  37. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  38. a342f39 src: Remove unneeded whitespace by Elyes HAOUAS · 6 years ago
  39. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  40. dabebc3 nb/intel/sandybridge: support more XMP timings by Dan Elkouby · 6 years ago
  41. 9ed74b5 nb/intel/ivybridge: Improve CAS freq selection by Arthur Heymans · 7 years ago
  42. cb7d6a1 nb/intel/sandybridge/raminit: Add default values by Patrick Rudolph · 8 years ago
  43. cab4d3d nb/intel/sandybridge/raminit: Add 100MHz refclock support by Patrick Rudolph · 8 years ago
  44. 77eaba3 nb/intel/sandybridge/raminit: Use Ivy Bridge specific values by Patrick Rudolph · 8 years ago
  45. 50db9c9 nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timings by Arthur Heymans · 7 years ago
  46. 305035c nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge by Patrick Rudolph · 8 years ago