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review.coreboot.org / coreboot / c49d7a3e6385a3eb2fae3b6eca36e8ca998f79ad / src / northbridge / intel / pineview / Makefile.inc
  1. c49d7a3 src/: Replace GPL boilerplate with SPDX headers by Patrick Georgi · 4 years, 2 months ago
  2. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  3. fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago
  4. aba8fb1 intel/i945,gm45,pineview,x4x: Move stage cache support function by Kyösti Mälkki · 5 years ago
  5. 8288228 nb/intel/pineview: Use MTRR as a proxy for proper reset by Arthur Heymans · 5 years ago
  6. 99e578e nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCK by Arthur Heymans · 5 years ago
  7. 20f7136 nb/intel/pineview: Put stage cache in TSEG by Arthur Heymans · 6 years ago
  8. c6ff1ac nb/intel/pineview: Move the boilerplate mainboard_romstage_entry by Arthur Heymans · 6 years ago
  9. aa7cf55 nb/intel/pineview: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  10. 51fdb92 nb/intel/pineview: Native VGA init (CRT) by Damien Zammit · 8 years ago
  11. 003d15c northbridge/intel/pineview: Add native raminit by Damien Zammit · 9 years ago
  12. f7060f1 northbridge/intel/pineview: Add remaining boilerplate code for northbridge by Damien Zammit · 9 years ago
  13. 6247793 northbridge/intel/pineview: Add minimal Pineview northbridge by Damien Zammit · 9 years ago