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review.coreboot.org / coreboot / c3bc6cbe9de9d65d25009fec8ae5475371724c6e / src / cpu / intel / car / p3 / cache_as_ram.S
  1. aea8eec nb/intel/i440bx: Switch to POSTCAR_STAGE by Kyösti Mälkki · 5 years ago
  2. 5bc46d8 cpu/intel/car/p3: Use variable MTRR count by Kyösti Mälkki · 5 years ago
  3. 54d6a28 cpu/intel/slot_1: Switch to different CAR setup by Kyösti Mälkki · 5 years ago
  4. 82112b2 cpu/intel/car: Remove obsolete files by Kyösti Mälkki · 5 years ago[Renamed from src/cpu/intel/car/cache_as_ram_ht.inc]
  5. 168ef39 cpu/*: Add whitespace around '<<' by Elyes HAOUAS · 6 years ago
  6. a8843de Use more secure HTTPS URLs for coreboot sites by Paul Menzel · 6 years ago
  7. 823020d intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup by Kyösti Mälkki · 7 years ago
  8. 39915bc intel cache-as-ram: Unify stack setup by Kyösti Mälkki · 7 years ago
  9. 2765a89 src/cpu: Improve code formatting by Elyes HAOUAS · 7 years ago
  10. d6e9686 src/cpu: Capitalize CPU, APIC and IOAPIC typo fix by Elyes HAOUAS · 7 years ago
  11. dc4820b intel car: Use MTRR WRPROT type for XIP cache by Kyösti Mälkki · 7 years ago
  12. 8a2f167 intel car: Unify postcodes by Kyösti Mälkki · 7 years ago
  13. eb61ea8 intel car: Unify whitespace and comment fixes by Kyösti Mälkki · 7 years ago
  14. 9ec6914 intel car: Remove guard on XIP_ROM_SIZE by Kyösti Mälkki · 7 years ago
  15. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 7 years ago
  16. b4f827d intel cache-as-ram: Fix comment about MTRRs by Kyösti Mälkki · 7 years ago
  17. 408d392 intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 7 years ago
  18. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 8 years ago
  19. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 8 years ago
  20. 4a45ec4 x86: Drop -Wa,--divide by Stefan Reinauer · 8 years ago
  21. 5264862 Remove empty lines at end of file by Elyes HAOUAS · 8 years ago
  22. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  23. 1729cd8 x86 romstage: Move stack just below RAMTOP by Kyösti Mälkki · 9 years ago
  24. 107f72e Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR by Kyösti Mälkki · 10 years ago
  25. 8ee04d7 usbdebug: Put ehci_debug_info in CAR_GLOBAL by Kyösti Mälkki · 10 years ago
  26. 648d166 copy_and_run: drop boot_complete parameter by Stefan Reinauer · 10 years ago
  27. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  28. df0fbc7 Intel CPUs: Fix counting of CPU cores by Kyösti Mälkki · 11 years ago
  29. 5458b9d Intel cpus: Extend cache to cover complete Flash Device by Kyösti Mälkki · 11 years ago
  30. 05e740f Replace cache control magic numbers with symbols by Patrick Georgi · 11 years ago
  31. 819c7d4 Whitespace fixes by Patrick Georgi · 11 years ago
  32. a860c68 Intel cpus: get MAXPHYADDR at runtime for new CAR by Kyösti Mälkki · 12 years ago
  33. 0078ceb Intel cpus: add hyper-threading CPU support to new CAR by Kyösti Mälkki · 12 years ago
  34. 05d6ffb Intel cpus: improve CPU compatibility of new CAR by Kyösti Mälkki · 12 years ago
  35. f9d1a42 Intel cpus: apply some good programming practices in new CAR by Kyösti Mälkki · 12 years ago
  36. 325b92f Intel cpus: cache actual size of the Flash ROM device by Kyösti Mälkki · 12 years ago
  37. 5a660ca Intel cpus: copy model_6ex CAR code by Kyösti Mälkki · 12 years ago