1. 9a1bb36 soc{broadcom,imgtec,mediatek,qualcomm}: stop using spi_xfer_two_vectors by Aaron Durbin · 4 years, 1 month ago
  2. 235daa4 driver/uart: Introduce a way for mainboard to override the baudrate by Julien Viard de Galbert · 4 years, 3 months ago
  3. 5268b76 src/soc: Fix various typos by Jonathan Neuschäfer · 4 years, 4 months ago
  4. aa8e5d3 soc: Add Kconfig for each soc vendor by Chris Ching · 4 years, 7 months ago
  5. b29078e mb/*/*: Remove rtc nvram configurable baud rate by Arthur Heymans · 5 years ago
  6. 01f9aa5 Consolidate reset API, add generic reset_prepare mechanism by Julius Werner · 5 years ago
  7. 2dafd89 spi: Remove unused/unnecessary spi_init function definitions by Furquan Shaikh · 5 years ago
  8. e173ee8 soc/imgtec/pistachio: Move spi driver to use spi_bus_map by Furquan Shaikh · 5 years ago
  9. de705fa drivers/spi: Re-factor spi_crop_chunk by Furquan Shaikh · 5 years ago
  10. c2973d1 spi: Get rid of SPI_ATOMIC_SEQUENCING by Furquan Shaikh · 5 years ago
  11. 94f8699 spi: Define and use spi_ctrlr structure by Furquan Shaikh · 5 years ago
  12. 36b81af spi: Pass pointer to spi_slave structure in spi_setup_slave by Furquan Shaikh · 5 years ago
  13. 0dba025 spi: Fix parameter types for spi functions by Furquan Shaikh · 5 years ago
  14. dc34fb6 spi: Get rid of max_transfer_size parameter in spi_slave structure by Furquan Shaikh · 6 years ago
  15. c28984d spi: Clean up SPI flash driver interface by Furquan Shaikh · 6 years ago
  16. 6ec72c9 drivers/uart: Use uart_platform_refclk for all UART models by Lee Leahy · 6 years ago
  17. 479e31e imgtec/pistachio: Fix memlayout ASSERT with new binutils by Stefan Reinauer · 6 years ago
  18. 0e3d7de urara: Increase bootblock size by Julius Werner · 6 years ago
  19. d189987 tegra132/pistachio: Increase romstage size in memlayout.ld by Julius Werner · 6 years ago
  20. 4f3d400 imgtec/pistachio: disable default RPU gate register values by Ionela Voinescu · 7 years ago
  21. 3218e79 imgtec/pistachio: memlayout: update GRAM size by Ionela Voinescu · 7 years ago
  22. 8835754 imgtec/pistachio: I2C: fix base address for I2C clock setup by Ionela Voinescu · 7 years ago
  23. 56e6459 imgtec/pistachio: identity map SOC registers region by Ionela Voinescu · 6 years ago
  24. 7100cf2 imgtec/pistachio: Add SOC_REGISTERS memory region by Ionela Voinescu · 7 years ago
  25. 1136447 imgtec/pistachio: Use SYS PLL in integer mode by Ionela Voinescu · 7 years ago
  26. e7a336a mips: add coherency argument to identity mapping by Ionela Voinescu · 7 years ago
  27. 90d1235 mainboard/google/urara: change SYS PLL to 700MHz by Ionela Voinescu · 7 years ago
  28. 721f299 imgtec/pistachio: DDR2, DDR3: DLL reset set by Ionela Voinescu · 7 years ago
  29. 6b95406 imgtec/pistachio: DDR2, DDR3: DQS gate early by Ionela Voinescu · 7 years ago
  30. f6d3bd4 imgtec/pistachio: increase CBFS cache by Ionela Voinescu · 7 years ago
  31. c32e80d Drop src/cpu/ indirection for MIPS by Stefan Reinauer · 6 years ago
  32. 2e8d4ed soc/imgtec/pistachio: add implementation for system reset by Ionela Voinescu · 6 years ago
  33. 3bdd45e soc/imgtec/pistachio: Implement hard_reset() by Stefan Reinauer · 6 years ago
  34. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 7 years ago
  35. d972f78 linking: link bootblock.elf with .data and .bss sections again by Aaron Durbin · 7 years ago
  36. e5bad5c verstage: use common program.ld for linking by Aaron Durbin · 7 years ago
  37. 60391b6 imgtec/pistachio: remove timestamp_get() implementation by Aaron Durbin · 7 years ago
  38. 6123490 imgtech/pistacho: Add vboot2 memory region by Patrick Georgi · 7 years ago
  39. ba71ca3 Remove address from GPLv2 headers by Patrick Georgi · 7 years ago
  40. eb22da0 Remove old HAVE_UART_MEMORY_MAPPED select statements by Martin Roth · 7 years ago
  41. 3fa1ad0 pistachio: add DDR3 initialization code by Ionela Voinescu · 7 years ago
  42. 1185c10 pistachio: Use passive windowing as DQS gating scheme by Ionela Voinescu · 7 years ago
  43. 1d4c305 pistachio: sort included header files by Ionela Voinescu · 7 years ago
  44. 11f33e4 pistachio: initialize cbmem area to be empty by Ionela Voinescu · 7 years ago
  45. 4f2f01a pistachio: increase romstage size by Ionela Voinescu · 7 years ago
  46. f4e859b Revert "pistashio: bump up romstage size" by Aaron Durbin · 7 years ago
  47. def0fb5 pistashio: bump up romstage size by Aaron Durbin · 7 years ago
  48. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 7 years ago
  49. e2b0aff Remove Kconfig variable that has no effect by Patrick Georgi · 7 years ago
  50. b4a6ca9 imgtec/pistachio: Add comment on the unusual memory layout by Patrick Georgi · 7 years ago
  51. 6e944c4 imgtech/pistachio: Give some more space to the bootblock by Patrick Georgi · 7 years ago
  52. aae53ab kbuild: automatically include SOCs by Stefan Reinauer · 7 years ago
  53. 5d997f9 imgtec/pistachio: DDR reads return to controller with no bubbles by Ionela Voinescu · 7 years ago
  54. a2c4f9e imgtec/pistachio: DDR row/bank/column mapping by Ionela Voinescu · 7 years ago
  55. 97db1fb soc: select generic gpio lib on (almost) all non-x86 SOCs by Stefan Reinauer · 7 years ago
  56. 11ecdb7 imgtec/pistachio: increase RAM CBFS cache size by Vadim Bendebury · 7 years ago
  57. 823f607 pistachio: Remove 50% DDR bandwidth restriction by Ionela Voinescu · 7 years ago
  58. 51ad6ac pistachio: Decrease DDR ODT from 75R to 50R by Ionela Voinescu · 7 years ago
  59. 59074ff pistachio: clean DDR2 initialization code by Ionela Voinescu · 7 years ago
  60. 38063b0 pistachio: add clock setup for all I2C interfaces by Ionela Voinescu · 7 years ago
  61. b8936ad urara: Identity map DRAM/SRAM by Andrew Bresticker · 7 years ago
  62. 8549797 imgtec/pistachio: Add spi_crop_chunk() by Patrick Georgi · 7 years ago
  63. b116a1a pistachio: Move console UART to a Kconfig variable by David Hendricks · 7 years ago
  64. d6aaca9 pistachio: add DDR2 initialization code by Ionela Voinescu · 7 years ago
  65. 7271e23 pistachio: report UART register width by Vadim Bendebury · 7 years ago
  66. 9dccf1c uart: pass register width in the coreboot table by Vadim Bendebury · 7 years ago
  67. fdce680 pistachio: implement clock setup for I2C0 by Ionela Voinescu · 7 years ago
  68. a702390 pistachio: Fix ROM clock base address by Ionela Voinescu · 7 years ago
  69. 8b1f23e urara: add clock setup for MIPS CPU, ROM and Ethernet by Ionela Voinescu · 7 years ago
  70. 41d1ca8 pistachio: fix clocks setup code by Ionela Voinescu · 7 years ago
  71. b9d59bb pistachio: Use 1.8433179 MHz for UART refclk by David Hendricks · 7 years ago
  72. 30fc667 pistachio: increase size of bootblock to 18 KB by Ionela Voinescu · 7 years ago
  73. 55b8dc0 pistachio: change memory layout as to allow bigger CBFS cache by Ionela Voinescu · 7 years ago
  74. 1c0d0c0 pistachio: spi: use same clock edge for RX and TX by Ionela Voinescu · 7 years ago
  75. b3f666b urara: Configure clocks and MFIOs by Ionela Voinescu · 7 years ago
  76. efcee76 CBFS: Automate ROM image layout and remove hardcoded offsets by Julius Werner · 8 years ago
  77. f9ff353 spi: support controllers with limited transfer size capabilities by Vadim Bendebury · 7 years ago
  78. b9d9615 urara: add support for DMA coherent memory area by Ionela Voinescu · 7 years ago
  79. fb3ea74 pistachio: increase the size of romstage to 36K by Ionela Voinescu · 7 years ago
  80. 420b0f6 pistachio: add timer frequency for SOC; correct platform ID by Ionela Voinescu · 7 years ago
  81. f3bc026 pistachio: add SOC descriptor by Vadim Bendebury · 7 years ago
  82. fe51cc4 pistachio: modify memory layout by Vadim Bendebury · 8 years ago
  83. 40ff8a5 pistachio: set correct CBMEM top address by Vadim Bendebury · 7 years ago
  84. cbc44f7 pistachio: allow more room for bootblock by Vadim Bendebury · 7 years ago
  85. 52a8879 pistachio: implement timer support by Vadim Bendebury · 8 years ago
  86. 0812568 pistachio: Change all SoC headers to <soc/headername.h> system by Julius Werner · 8 years ago
  87. a48ca84 kconfig: drop intermittend forwarder files by Stefan Reinauer · 7 years ago
  88. ec5e5e0 New mechanism to define SRAM/memory map with automatic bounds checking by Julius Werner · 8 years ago
  89. 1d84ef5 pistachio: add gpio type definition by Vadim Bendebury · 8 years ago
  90. 5c9f534 urara: Fix CBFS header definitions by Vadim Bendebury · 8 years ago
  91. 146d05d imgtec/pistachio: Bring uart driver to modern standards by Patrick Georgi · 7 years ago
  92. 8880df1 pistachio: don't open code ramstage loading by Aaron Durbin · 7 years ago
  93. 49aad6b soc/imgtec/pistachio: Add IMGTEC SPI controller driver by Ionela Voinescu · 8 years ago
  94. 2d510d0 urara: use proper SOC name by Vadim Bendebury · 8 years ago
  95. 197b801 mips: fix bootblock stack definitions by Vadim Bendebury · 8 years ago
  96. f16b082 danube: Use the generic timer interface by Vadim Bendebury · 8 years ago
  97. c7b3f72 danube: use SOC specific rom stage code by Vadim Bendebury · 8 years ago
  98. b2e465d danube: prepare SOC directory for urara by Vadim Bendebury · 8 years ago
  99. c1081a4 imgtec/danube: Add support for ImgTec Danube SoC by Paul Burton · 8 years ago