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bf53acca5e9c6b61086e42eb9e73fd4bb59a6f31
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northbridge
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intel
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x4x
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x4x.h
bf53acc
nb/intel/x4x: Move boilerplate romstage to a common location
by Arthur Heymans
· 4 years, 9 months ago
dc972e1
nb/intel/x4x.h: Include stdint.h
by Arthur Heymans
· 4 years, 9 months ago
6190d0b
nb/intel/x4x/x4x.h: Include iomap.h
by Arthur Heymans
· 4 years, 10 months ago
d7205be
nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use
by Kyösti Mälkki
· 5 years ago
e951e8e
nb/x4x: Rename {ddr,fsb}2{mhz,ps} as {ddr,fsb}_to_{mhz,ps}
by Elyes HAOUAS
· 5 years ago
4c65bfc
nb/intel/x4x: Use common code for SMM in TSEG
by Arthur Heymans
· 6 years ago
6cd2c2f
northbridge/x4x: add MCHBAR AND/OR/AND_OR access macros
by Felix Held
· 6 years ago
0602ce6
nb/intel/x4x: Add the option for stacked channel map settings
by Arthur Heymans
· 6 years ago
0d28495
nb/intel/x4x: Adapt post JEDEC for DDR3
by Arthur Heymans
· 7 years ago
3fa103a
nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings
by Arthur Heymans
· 7 years ago
b5170c3
nb/intel/x4x: Implement write leveling
by Arthur Heymans
· 7 years ago
f128726
nb/intel/x4x: Add DDR3 JEDEC init
by Arthur Heymans
· 7 years ago
7a3a319
nb/intel/x4x/raminit: Make programming launch ddr3 specific
by Arthur Heymans
· 7 years ago
a2cc231
nb/intel/x4x: Rename a things that are not specific to DDR2
by Arthur Heymans
· 7 years ago
1848ba3
nb/x4x/raminit: Decode ddr3 dimms
by Arthur Heymans
· 7 years ago
95c48cb
nb/intel/x4x: Implement both read and write training
by Arthur Heymans
· 7 years ago
fea02e1
nb/x4x: Get rid of device_t
by Elyes HAOUAS
· 7 years ago
276049f
nb/intel/x4x: Add a convenient macro to loop over bytelanes
by Arthur Heymans
· 7 years ago
1994e448
nb/intel/x4x: Clarify the raminit memory mapping
by Arthur Heymans
· 7 years ago
0bf87de
nb/intel/x4x: Refactor setting default dll settings
by Arthur Heymans
· 7 years ago
adc571a
nb/intel/x4x: Use SPI flash to cache raminit results
by Arthur Heymans
· 7 years ago
3cf9403
nb/x4x/raminit: Rewrite SPD decode and timing selection
by Arthur Heymans
· 7 years ago
6d7a8c1
nb/intel/x4x/raminit: Rework receive enable calibration
by Arthur Heymans
· 7 years ago
27f0ca1
nb/intel/x4x: Use a struct for dll settings instead of an array
by Arthur Heymans
· 7 years ago
70a1dda
nb/intel/x4x: Fix issues found by checkpatch.pl
by Arthur Heymans
· 7 years ago
ef7e98a
nb/intel/x4x: Implement resume from S3 suspend
by Arthur Heymans
· 8 years ago
97e13d8
nb/intel/x4x: Fix raminit on reset path
by Arthur Heymans
· 8 years ago
5b30b82
nb/x4x: Fix sticky scratchpad register offset
by Arthur Heymans
· 8 years ago
3c20906
nb/intel/x4x/raminit: Fix DIMM_IN_CHANNEL calculation
by Nico Huber
· 8 years ago
696abfc
nb/intel/x4x: Fix and deflate `dimm_config` in raminit
by Nico Huber
· 8 years ago
128c104
nb/intel: Fix some spelling mistakes in comments and strings
by Martin Roth
· 8 years ago
6e8b3c1
src/northbridge: Improve code formatting
by Elyes HAOUAS
· 8 years ago
60a6e15
northbridge/intel/x4x: transition away from device_t
by Antonello Dettori
· 8 years ago
a99c64e
nb/intel/x4x: Turn on PEG graphics in device enable
by Damien Zammit
· 8 years ago
68e1dcf
nb/intel/x4x: Fix unpopulated value
by Damien Zammit
· 8 years ago
a090ae0
nb/intel/x4x: Add DMI/EP init
by Damien Zammit
· 8 years ago
fe9876a
nb/intel/x4x: Tidy up northbridge
by Damien Zammit
· 9 years ago
cbe3892
northbridge/intel/x4x: clean up includes
by Martin Roth
· 9 years ago
43a1f78
northbridge/intel/x4x: Intel 4-series northbridge support
by Damien Zammit
· 9 years ago