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review.coreboot.org / coreboot / bf53acca5e9c6b61086e42eb9e73fd4bb59a6f31 / src / mainboard / intel / dg41wv / romstage.c
  1. bf53acc nb/intel/x4x: Move boilerplate romstage to a common location by Arthur Heymans · 4 years, 9 months ago
  2. 2452afb mb/*/*(ich7/x4x): Use common early southbridge init by Arthur Heymans · 4 years, 9 months ago
  3. fecf777 sb/intel/i82801gx: Add common LPC decode code by Arthur Heymans · 4 years, 9 months ago
  4. 10cfd4d mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>' by Elyes HAOUAS · 4 years, 9 months ago
  5. 2437fe9 sb/intel/i82801gx: Move CIR init to a common place by Arthur Heymans · 4 years, 11 months ago
  6. cd7a70f soc/intel: Use common romstage code by Kyösti Mälkki · 5 years ago
  7. 157b189 cpu/intel: Enter romstage without BIST by Kyösti Mälkki · 5 years ago
  8. 425e75a sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB by Patrick Rudolph · 5 years ago
  9. 3855c01 device/pnp: Add header files for PNP ops by Kyösti Mälkki · 5 years ago
  10. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  11. 8c905a8 mb/{asrock,intel,kontron}: Include missing <arch/io.h> by Elyes HAOUAS · 6 years ago
  12. 0c152cf src: Remove unused include device/pnp_def.h by Elyes HAOUAS · 6 years ago
  13. f5a57a8 mb: Move timestamp_add_now to northbridge x4x by Elyes HAOUAS · 6 years ago
  14. 4513020 cpu/intel: Use the common code to initialize the romstage timestamps by Arthur Heymans · 6 years ago
  15. 6267f5d sb/intel/i82801gx: Autodisable functions based on devicetree by Arthur Heymans · 6 years ago
  16. c21df03 arch/x86: Drop spurious arch/stages.h includes by Kyösti Mälkki · 6 years ago
  17. e308cc6 mb: Get rid of unneeded include <cbmem.h> by Elyes HAOUAS · 6 years ago
  18. fbc508f mb/intel/dg41wv: Add mainboard by Arthur Heymans · 7 years ago