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review.coreboot.org / coreboot / bf0970e762a6611cef06af761bc2dec068d439bb / src / southbridge / amd / pi / hudson / sata.c
  1. bf0970e src: Use include <delay.h> when appropriate by Elyes HAOUAS · 5 years ago
  2. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  3. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  4. e9a0130 src: Remove unneeded include <console/console.h> by Elyes HAOUAS · 6 years ago
  5. 9d9a552 AGESA binaryPI: Fix PCI ID namespace by Kyösti Mälkki · 8 years ago
  6. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  7. f2dfef0 southbridge/amd/pi: Add support for new AMD southbridge Kern by WANG Siyuan · 9 years ago
  8. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  9. bc21a41 southbridge/amd/pi: Rename Avalon to Hudson by Dave Frodin · 10 years ago[Renamed from src/southbridge/amd/pi/avalon/sata.c]
  10. 6b31431 southbridge/amd/pi: Correct several yangtze/avalon typos by Dave Frodin · 10 years ago
  11. e8b4da2 AMD: Isolate AGESA and PI build environments for southbridge by Kyösti Mälkki · 10 years ago