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review.coreboot.org / coreboot / bde6d309dfafe58732ec46314a2d4c08974b62d4 / src / southbridge / intel / lynxpoint / usb_xhci.c
  1. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  2. 6dbbe2e intel/lynxpoint: Allow to always route USB3 ports to XHCI by Stefan Reinauer · 11 years ago
  3. 32d2e2b intel/lynxpoint: Work around XHCI resume issues by Duncan Laurie · 11 years ago
  4. 16a0f5c intel/lynxpoint: xhci: Revert suspend/resume changes by Duncan Laurie · 11 years ago
  5. 88c873a intel/lynxpoint: xhci: Port reset changes on suspend/resume by Duncan Laurie · 11 years ago
  6. 527b03a intel/lynxpoint: xhci: Update magic bits to new magic values by Duncan Laurie · 11 years ago
  7. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  8. 0bf1dea lynxpoint: Fix an issue clearing port change status bits by Duncan Laurie · 11 years ago
  9. 0dcb577 lynxpoint: Fix issues with XHCI init by Duncan Laurie · 11 years ago
  10. 911cedf lynxpoint: Route all USB ports to XHCI in finalize step by Duncan Laurie · 11 years ago
  11. 1f52908 lynxpoint: Move USB SMI sleep code to separate USB files by Duncan Laurie · 11 years ago
  12. 2d9d39a lynxpoint: Enable USB clock gating, late setup, and sleep prep by Duncan Laurie · 11 years ago