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review.coreboot.org / coreboot / bde6d309dfafe58732ec46314a2d4c08974b62d4 / src / southbridge / intel / fsp_rangeley
  1. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  2. cd02ef1 Intel FSP platforms: Fix timestamps by Kyösti Mälkki · 10 years ago
  3. 5ab52dd southbridge: Drop print_ implementation from non-romcc boards by Stefan Reinauer · 10 years ago
  4. 3a6550d timestamps: Switch from tsc_t to uint64_t by Stefan Reinauer · 11 years ago
  5. 71b2145 CBMEM console: Fix boards with BROKEN_CAR_MIGRATE by Kyösti Mälkki · 10 years ago
  6. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 10 years ago
  7. 87f3b4e spi: Remove the spi_set_speed and spi_cs_is_valid functions. by Gabe Black · 10 years ago
  8. a0a71b0 fsp platfoms: add prototype & consolidate main entry-point by Martin Roth · 10 years ago
  9. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  10. 24d875b ACPI: Remove CBMEM TOC from GNVS by Kyösti Mälkki · 10 years ago
  11. 609d22f intel: Remove IRQ1 from possible PIRQ assignemnt. by Vladimir Serbinenko · 10 years ago
  12. c36af7b Replace includes of build.h with version.h by Kyösti Mälkki · 10 years ago
  13. 689ddf6 fsp_rangeley: Switch to per-device ACPI by Vladimir Serbinenko · 10 years ago
  14. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  15. 822bc65 ACPI: Remove CONFIG_GENERATE_ACPI_TABLES by Vladimir Serbinenko · 11 years ago
  16. 174a891 southbridge/intel/fsp_rangeley: fix to include irqroute.h twice by Martin Roth · 10 years ago
  17. 829c41d southbridge/intel: Add fsp_rangeley support by Martin Roth · 10 years ago