- 63ee160 soc/mediatek/mt8183: Enable CA perbit mechanism by Huayang Duan · 4 years, 3 months ago
- 0e6cb83 soc/mediatek/mt8183: Add ddr geometry to support 6GB, 8GB DDR bootup by Huayang Duan · 4 years, 3 months ago
- cac990f soc/mediatek/mt8183: Add missing register settings for channels by Huayang Duan · 4 years, 2 months ago
- 0626466 soc/mediatek/mt8183: Set CA and DQ vref range to correct value by Huayang Duan · 4 years, 4 months ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
- e67ab18 soc/mediatek: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
- 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
- 55009af Change all clrsetbits_leXX() to clrsetbitsXX() by Julius Werner · 4 years, 9 months ago
- 947916e soc/mediatek/mt8183: Pass MR values as function arguments by Yu-Ping Wu · 4 years, 10 months ago
- 4d4ccce soc/mediatek/mt8183: Pass impedance data as a function argument by Yu-Ping Wu · 4 years, 11 months ago
- cea735c soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switch by Huayang Duan · 5 years ago
- 553e2db soc/mediatek/mt8183: Remove unnecessary DRAM register settings by Yu-Ping Wu · 4 years, 10 months ago
- 88ce804 soc/mediatek/mt8183: Fix DDR phy config number by Yu-Ping Wu · 4 years, 10 months ago
- 5b29f17 soc/mediatek/mt8183: Refactor DRAM init by bit fields API by Hung-Te Lin · 5 years ago
- 31ec0c4 soc/mediatek/mt8183: Improve code formatting by Yu-Ping Wu · 4 years, 11 months ago
- 846be44 soc/mediatek/mt8183: Use cached calibration result for faster bootup by Huayang Duan · 5 years ago
- 7378015 mediatek/mt8183: Implement the dramc init setting by Huayang Duan · 5 years ago
- b8f65ad mediatek/mt8183: fix mode register setting fail issue by Huayang Duan · 5 years ago
- 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
- e19d61b mediatek/mt8183: Initialize DRAM with a sequence in constant array by Huayang Duan · 6 years ago