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coreboot
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ba22e159bb21549ba92eb6e9d91eaa097a54985b
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src
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cpu
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amd
/
agesa
/
cache_as_ram.inc
ba22e15
AGESA: Disable CAR with empty stack
by Kyösti Mälkki
· 8 years ago
1779d53
AGESA: BIST is already preserved
by Kyösti Mälkki
· 8 years ago
df7ff31
AGESA: Move romstage main entry under cpu
by Kyösti Mälkki
· 8 years ago
13cf135
AGESA: Move amd_initmmio() call
by Kyösti Mälkki
· 8 years ago
26929bd
AGESA: Fix SSE regression and align stack early
by Kyösti Mälkki
· 8 years ago
f6fe2f1
AGESA binaryPI: Fix cache-as-ram for x86_64
by Kyösti Mälkki
· 8 years ago
585d1a0
src/cpu: Capitalize ROM and RAM
by Elyes HAOUAS
· 8 years ago
4a30ab9
cpu/amd: remove .intel_syntax
by Patrick Georgi
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
67b9430
cpu: port amd/agesa to 64bit
by Stefan Reinauer
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
8c0cb8a
Correct file permissions.
by Idwer Vollering
· 11 years ago
59c3a06
AMD AGESA: Remove INVD instruction when transitioning from CAR
by Bruce Griffith
· 11 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
f3b86b3
AMD agesa: add enable cache at the end of disable_cache_as_ram
by Siyuan Wang
· 12 years ago
05e740f
Replace cache control magic numbers with symbols
by Patrick Georgi
· 12 years ago
f722373
S3 code in coreboot public folder.
by zbao
· 12 years ago
4b50834
Add AMD Family 10 support to cpu folder
by efdesign98
· 13 years ago
[Renamed (89%) from src/cpu/amd/agesa/family12/cache_as_ram.inc]
7c0c64e
Addition of Family12/SB900 wrapper code
by efdesign98
· 13 years ago