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review.coreboot.org / coreboot / b863425402db859e0d9ec569f3f98f9756ed516f / src / mainboard / cubietech
  1. ec5e5e0 New mechanism to define SRAM/memory map with automatic bounds checking by Julius Werner · 10 years ago
  2. e4f3e7a romstages: use common run_ramstage() by Aaron Durbin · 9 years ago
  3. 8900739 cubieboard: use new arm bootblock infrastructure by Alexander Couzens · 10 years ago
  4. fd33781 Move ARCH_* from board/Kconfig to cpu or soc Kconfig. by Furquan Shaikh · 10 years ago
  5. f385ba4 console: Move UART port defaults to mainboard by Kyösti Mälkki · 10 years ago
  6. 20f25dd Rename coreboot_ram stage to ramstage by Furquan Shaikh · 10 years ago
  7. 01c4400 cubieboard: Enable the SD controller and mux SD pins by Alexandru Gagniuc · 11 years ago
  8. 1d7541f console: Fix includes by Kyösti Mälkki · 10 years ago
  9. 047c10c boardstatus: Add new category "sbc". by Vladimir Serbinenko · 11 years ago
  10. 93b600d cubieboard: Setup CPU clock in romstage and load ramstage by Alexandru Gagniuc · 11 years ago
  11. 8e053af cubieboard: Configure system voltages from devicetree by Alexandru Gagniuc · 11 years ago
  12. 5d8b0a9 cubieboard: Initialize memory in bootblock by Alexandru Gagniuc · 11 years ago
  13. 391622a cubieboard: Keep AHB clock within specs by Alexandru Gagniuc · 11 years ago
  14. 30c20e9 cubieboard: Turn on green LED during bootblock by Alexandru Gagniuc · 11 years ago
  15. bc30b2b cpu/allwinner/a10: Refactor API for gating clocks to peripherals by Alexandru Gagniuc · 11 years ago
  16. 8226dbb cpu/allwinner/a10: Refactor and document pinmux API by Alexandru Gagniuc · 11 years ago
  17. 14964dd mainboard: Add preliminary support for A10-based Cubieboard by Alexandru Gagniuc · 11 years ago