1. b85a87b intel SMI handlers: Refactor GPI SMI/SCI routing by Kyösti Mälkki · 10 years ago
  2. 59aef5c southbrige/intel/bd82x6x: add XHCI overcurrent map config by Nicolas Reinecke · 9 years ago
  3. 0b29a7b southbrige/intel/bd82x6x: XHCI replace magic values by Nicolas Reinecke · 9 years ago
  4. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  5. 6d1158f southbridge/intel/bd82x6x native usb init: replace some magic values by Nicolas Reinecke · 10 years ago
  6. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  7. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago
  8. 3dc12c1 bd82x6x: Consolidate early native USB init by Vladimir Serbinenko · 10 years ago
  9. 332f14b bd82x6x: Move common bd82x6x S3 detect to bd82x6x code. by Vladimir Serbinenko · 10 years ago
  10. 7686a56 sandy/ivybridge: Native raminit. by Vladimir Serbinenko · 10 years ago
  11. 9c50e6a Intel BD82x6x: LPC: Unify I/O APIC setup by Paul Menzel · 11 years ago
  12. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  13. 783f226 Add bd82x6x PCH functions to SMM by Marc Jones · 12 years ago
  14. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  15. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  16. d4bc067 SPI: Add early romstage SPI driver using hardware sequencing by Duncan Laurie · 12 years ago
  17. 924342b SPI: Add Fast Read to the OPMENU for locked down SPI by Duncan Laurie · 12 years ago
  18. 9d81c19 PCH: Add register descriptions used by IGD OpRegion by Stefan Reinauer · 12 years ago
  19. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  20. 16b022a Perform additional programming requirements for SATA by Stefan Reinauer · 12 years ago
  21. cfb64bd SATA: Add option to configure gen3 transmitter by Duncan Laurie · 12 years ago
  22. 800e950 ELOG: Log boot-time events found in southbridge by Duncan Laurie · 12 years ago
  23. 22935e1 CPU: Set flex ratio to nominal TDP ratio in bootblock by Duncan Laurie · 12 years ago
  24. b9fe01c Add an option to enable PCIe root port coalescing by Duncan Laurie · 12 years ago
  25. 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago