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review.coreboot.org / coreboot / b7fec825febefd3c7dd2e82539da45f1ec9415e7 / src / include
  1. 1825be2 Get the Via EPIA-N(L)/CN400 to a reasonable level of maturity:: by Jon Harrison · 15 years ago
  2. f5c38c0 Fix a redundant declaration warning (trivial) by Stefan Reinauer · 15 years ago
  3. b657a3c This fixes a couple of issues with older Linux kernels (that expect an XSDT as by Stefan Reinauer · 15 years ago
  4. 4d933dd Rewrite interrupt handling in coreboot to be more comprehensible and by Stefan Reinauer · 15 years ago
  5. 0001a7f Example how simple it is to use printk instead of printk_something in by Stefan Reinauer · 15 years ago
  6. bb01f60 Some USB debug updates, mostly comments fixing, license header updates by Stefan Reinauer · 15 years ago
  7. 85a94f6 Rename some preprocessor symbols. I have no idea why by Patrick Georgi · 15 years ago
  8. 951f588 The file string.h is also included in romcc code, which has no malloc(). by Stefan Reinauer · 15 years ago
  9. f107538 strdup the input of dirname, as dirname is free by Patrick Georgi · 15 years ago
  10. bd4f2f8 Fix many things for via/epia-m700 to build. by Myles Watson · 15 years ago
  11. 29cc9ed Move the v3 resource allocator to v2. by Myles Watson · 15 years ago
  12. 1a692d8 Add support for the Intel Eagle Heights development board. by Thomas Jourdan · 15 years ago
  13. 9a7368d I missed three files. by Jon Harrison · 15 years ago
  14. 0867062 This patch unifies the use of config options in v2 to all start with CONFIG_ by Stefan Reinauer · 15 years ago
  15. c263b44 Fix for Erratum 343 for AMD Fam10h CPUs. by Marco Schmidt · 15 years ago
  16. a9c5ea0 Revert "CMOS: Add set_option and rework get_option." by Luc Verhaegen · 15 years ago
  17. 9ceae90 CMOS: Add set_option and rework get_option. by Luc Verhaegen · 15 years ago
  18. 5c5beb7 Implement native VGA Support. by Luc Verhaegen · 15 years ago
  19. d1185bf Attached patch moves the CBFS payload loader to selfboot.c as it's by Patrick Georgi · 15 years ago
  20. 5eceb32 Allow dynamic size for the {s,}elfboot bounce buffer. by Patrick Georgi · 15 years ago
  21. cd5d756 Use the debugging functions to print out the tree and resources. by Myles Watson · 15 years ago
  22. bb3d812 Bring v3-style debug output to v2. Fix a minor typo. by Myles Watson · 15 years ago
  23. fa12b67 Remove warnings from compilation of the s2892 with and without CBFS. by Myles Watson · 15 years ago
  24. d9b1c4f This patch adds support for the BCM21000 (aka HT-2100) PCIe bridge. by Mondrian nuessle · 15 years ago
  25. 73d5daa * Allow coreboot to use the full 256 bytes of CMOS memory by Stefan Reinauer · 15 years ago
  26. 7e16bf3 - function prototypes do not need "extern" by Stefan Reinauer · 15 years ago
  27. 4855f56 add define for Role-Based Error Reporting to PCIe defines (trivial) by Stefan Reinauer · 15 years ago
  28. 16cdbb2 Eliminate various issues brought up by scan-build. by Patrick Georgi · 15 years ago
  29. aeba92a Add VIA CX700 support, plus VIA vt8454c reference board support. by Stefan Reinauer · 15 years ago
  30. 56c51bd This needed to be removed. by Ronald G. Minnich · 15 years ago
  31. 483b7bb v2/src romfs->cbfs rename by Peter Stuge · 15 years ago
  32. 8d9f932 unify spd_ddr2.h (trivial) by Stefan Reinauer · 15 years ago
  33. df77f34 (trivial) fix some warnings by Stefan Reinauer · 15 years ago
  34. d7a709a These are some cleanups and changes. These are build and boot tested on qemu. by Ronald G. Minnich · 15 years ago
  35. 90e0271 forgot this. by Ronald G. Minnich · 15 years ago
  36. 3081bdf Drop CONFIG_CHIP_NAME. Those config statements in Config.lb should by Stefan Reinauer · 15 years ago
  37. efab4ba This patch adds "high coreboot table support" to coreboot version 2. by Stefan Reinauer · 15 years ago
  38. 6d07c93 Fix all build problems on PPC except the _SDA_BASE issues caused by the by Stefan Reinauer · 15 years ago
  39. be7f798 This, ladies and gentlement, is commit #4000. by Stefan Reinauer · 15 years ago
  40. 3b38745 * fix a minor power state issue in the ich7 smm handler by Stefan Reinauer · 15 years ago
  41. 43b29cf Fix mmconf (PCIe memory mapped config space access) support in v2. It was by Stefan Reinauer · 15 years ago
  42. 36c8340 Some changes required to get yabel working on v2 (and they generally make by Stefan Reinauer · 15 years ago
  43. 2b34db8 coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3 by Stefan Reinauer · 15 years ago
  44. 3c7f46b Generic approach of putting BIOS tables at the end of memory by Stefan Reinauer · 15 years ago
  45. a175533 Change Log: Bellongs to r3947 by Rudolf Marek · 16 years ago
  46. a829bfe add a header file for i8259.h (trivial) by Stefan Reinauer · 16 years ago
  47. 5833f7c Backport all x86emu fixes from Pattrick Hueper to coreboot v2 (acked in v2, by Stefan Reinauer · 16 years ago
  48. c598330 fix compiler warnings (trivial) by Stefan Reinauer · 16 years ago
  49. 90308bb Check the printk format string against the matching arguments. We have by Carl-Daniel Hailfinger · 16 years ago
  50. 79e5325 The attached patch adds missing bits to ACPI to make Windows XP and Windows Vista happy. by Rudolf Marek · 16 years ago
  51. e562f72 Fix a LOT of implicit function declarations before they become errors. by Corey Osgood · 16 years ago
  52. 43bb9cd This patch gets rid of all the implicit definition warnings for serengeti except get_nodes. by Myles Watson · 16 years ago
  53. 045c348 Move mainboard specific changes to the coreboot memory table into the by Stefan Reinauer · 16 years ago
  54. 81af3d4 [PATCH] coreboot-v2: Add multiboot support by Robert Millan · 16 years ago
  55. 5d7a1c8 Revert i945/ICH7 PCI IDs to be hard-coded numbers instead of #defines. by Uwe Hermann · 16 years ago
  56. bddc693 i945/ICH7: Use #defines from pci_ids.h (trivial). by Uwe Hermann · 16 years ago
  57. debb11f Support for the Intel ICH7 southbridge. by Stefan Reinauer · 16 years ago
  58. b7d781d Move AMD RS690 and SB600 PCI IDs to pci_ids.h where they should be. by Uwe Hermann · 16 years ago
  59. 06755e4 Patch for AMD RS690 chipset. by Michael Xie · 16 years ago
  60. d9f29c8 This patch adds support for the VIA VT8237S south bridge. The VT8237R programming remains unchanged (tested by Rudolf Marek · 16 years ago
  61. d39aad9 Add definitions for DDR2 SPD registers. by Ed Swierk · 16 years ago
  62. 6adfaa69 This patch adds PCI device IDs for the Intel EP80579 Integrated Processor, by Ed Swierk · 16 years ago
  63. 6852406 Go back to SIPI WAIT state for those CPUS defining the newly introduced by Stefan Reinauer · 16 years ago
  64. 951c62f add some SPD values from specs. (trivial) by Stefan Reinauer · 16 years ago
  65. a91e0fe function prototypes don't need extern. (trivial) by Stefan Reinauer · 16 years ago
  66. c2e8fd4 Adds a field to the serial port descriptor about the configured line speed. by Patrick Georgi · 16 years ago
  67. 316e07f Following patch adds K8M890 support. It initializes the AGP and graphics UMA. by Rudolf Marek · 16 years ago
  68. c221349 Following patch will setup KT890 HT automatically. It will find the by Rudolf Marek · 16 years ago
  69. 4f83d7e oops. sorry, wrong checkin. This patch backs out r3155 and instead contains the by Ed Swierk · 16 years ago
  70. bd3f93e Add support for the Via CN700 with a C7 CPU and DDR2 RAM. Only a single DIMM is by Corey Osgood · 17 years ago
  71. 10aca3c This patch fixes the decoding of the IO address range 0x0820->0x0827 into the by Florentin Demetrescu · 17 years ago
  72. 3bbf2ff Add a new record type "console" for lbtable, and insert one record by Patrick Georgi · 17 years ago
  73. 8c2a0c1 This patch adds a new record type for lbtable to provide information by Patrick Georgi · 17 years ago
  74. ca374d4 rename linuxbios_* files, too. by Stefan Reinauer · 17 years ago
  75. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 17 years ago
  76. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 17 years ago
  77. 9cb314b Add Intel 3100 integrated northbridge/southbridge/superio PCI IDs. by Ed Swierk · 17 years ago
  78. ba8965c Changed the stop_this_cpu() to just hlt. by Marc Jones · 17 years ago
  79. 8ae8c88 Initial AMD Barcelona support for rev Bx. by Marc Jones · 17 years ago
  80. 447aafe Restructure/rename/comment a few 82371XX-related PCI IDs (trivial). by Uwe Hermann · 17 years ago
  81. 31e805d * Maintaining SiS south bridge device IDs. * Strip unnecessary driver modules. by Morgan Tsai · 17 years ago
  82. 908ff5e This patch masks the function prototypes in stdlib.h from ROMCC, so that by Corey Osgood · 17 years ago
  83. b294582 Add PCI IDs for most Intel southbridges of the 82801 series by Uwe Hermann · 17 years ago
  84. a29ec06 Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up to by Uwe Hermann · 17 years ago
  85. 02b2365 This patch is some small changes to the vt8237r to prepare it for by Corey Osgood · 17 years ago
  86. 218c265 1. vgabios removed, will go to extra repository by Morgan Tsai · 17 years ago
  87. 418bc91 Add support for the VIA VT8237R southbridge. by Rudolf Marek · 17 years ago
  88. 55e6eba Move ARRAY_SIZE to stdlib.h to make it available to all code (trivial). by Uwe Hermann · 17 years ago
  89. c49b834 Add SiS device IDs for further update. by Morgan Tsai · 17 years ago
  90. 22c6afc Drop duplicate 82371AB device IDs (trivial). by Uwe Hermann · 17 years ago
  91. 1410c2d Intel 82371EB: Add IDE init support. by Uwe Hermann · 17 years ago
  92. ddf845f This patch cleans up and clarifies Geode source code comments. by Marc Jones · 17 years ago
  93. a909ee6 This patch updates the PCI ID of the Geode IDE device to include the revision. by Marc Jones · 17 years ago
  94. 08da4f1 This repairs the other Geode mainboards so they'll build with the new by Marc Jones · 17 years ago
  95. a67d4fd This patch re-implements support for the CS5536 companion chip for the by Marc Jones · 17 years ago
  96. bc8176c This patch adds support for the AMD Geode LX CPU. (rediffed) by Marc Jones · 17 years ago
  97. 6818245 Add missing license headers to some Geode LX related files. by Jordan Crouse · 17 years ago
  98. a3cf00e two more directories from YhLu's mcp55 megapatch. by Yinghai Lu · 17 years ago
  99. d57241f This is (most of) the usb2 debug console code ripped out of by Yinghai Lu · 17 years ago
  100. c3aaf6a This patch adds the MCP55 PCI IDs (without which the southbridge code by Ed Swierk · 18 years ago