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review.coreboot.org / coreboot / b7c39b2bc1a98bf9716ae6dae59099556fabfa8f / src / arch / riscv / bootblock_simple.c
  1. 86fc11d arm/arm64: Generalize bootblock C entry point by Julius Werner · 8 years ago
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 8 years ago
  3. c4e49f6 Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() by Martin Roth · 8 years ago
  4. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 8 years ago
  5. f5d7f60 bootblocks: use run_romstage() by Aaron Durbin · 8 years ago
  6. e0e784a Add UCB RISCV support for architecture, soc, and emulation mainboard.. by Ronald G. Minnich · 9 years ago