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review.coreboot.org / coreboot / b71d9b8a0f02d5f458620cb21cdfe7799b1faf84 / src / soc / intel / broadwell / pcie.c
  1. b71d9b8 Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings. by Kenji Chen · 10 years ago
  2. e383feb Broadwell: Synchronize for power management with FRC by Kenji Chen · 10 years ago
  3. c373f50 Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRC by Kenji Chen · 10 years ago
  4. 8ef55ee Broadwell: Revise programming flow for write-once registers by Kenji Chen · 10 years ago
  5. 87d4a20 broadwell: Configure IOSF Port and Grant Count by Kenji Chen · 10 years ago
  6. 642e598 broadwell: Update PCIe configuration to follow BWG by Kane Chen · 10 years ago
  7. 4613472 broadwell: Fix some errors in selftest by Kane Chen · 10 years ago
  8. 4fef5a2 broadwell: Apply pcie updates from 2.1.0 ref code by Kane Chen · 10 years ago
  9. 446fb8e broadwell: Misc updates from 2.1.0 ref code by Duncan Laurie · 10 years ago
  10. de7ed6f intel/broadwell: Spelling fixes by Martin Roth · 10 years ago
  11. c88c54c broadwell: add new intel SOC by Duncan Laurie · 10 years ago