1. 29cc9ed Move the v3 resource allocator to v2. by Myles Watson · 15 years ago
  2. 1a692d8 Add support for the Intel Eagle Heights development board. by Thomas Jourdan · 15 years ago
  3. 6c96517 Fix typo and only output post code if the work was done. by Myles Watson · 15 years ago
  4. db8b411 Add AMD family 10 AM2r2 support. by Zheng Bao · 15 years ago
  5. 0867062 This patch unifies the use of config options in v2 to all start with CONFIG_ by Stefan Reinauer · 15 years ago
  6. 3310d75 by Rudolf Marek · 15 years ago
  7. aac8dc8 Patch AMD Fam10 C2 for errata 327, 344, 346, 354, 351. by Marc Jones · 15 years ago
  8. cbefc23 Maximilian Thuermer found a bug where the HT link capability code was always by Marc Jones · 15 years ago
  9. c263b44 Fix for Erratum 343 for AMD Fam10h CPUs. by Marco Schmidt · 15 years ago
  10. a9c5ea0 Revert "CMOS: Add set_option and rework get_option." by Luc Verhaegen · 15 years ago
  11. 9ceae90 CMOS: Add set_option and rework get_option. by Luc Verhaegen · 15 years ago
  12. a034dca Move coreboot_ram and coreboot_apc to CBFS. This allows to by Patrick Georgi · 15 years ago
  13. 99fd2a3 Update equivalent processor revision ID to load latest microcode patches and by Marc Jones · 15 years ago
  14. 0520d55 This patch adds high table support to qemu. It was already added to by Myles Watson · 15 years ago
  15. 032a965 Trivial white space fixes so that the next patches are easier to read. by Myles Watson · 15 years ago
  16. ef04d82 The rev 4099 broke ECC boards, they need to have tidy the ECC tags. Myles reverted this change. by Rudolf Marek · 15 years ago
  17. 88e71e8 Run dos2unix on all files: by Stefan Reinauer · 15 years ago
  18. fa12b67 Remove warnings from compilation of the s2892 with and without CBFS. by Myles Watson · 15 years ago
  19. c7757f2 * Use latest version of intel microcodes from their Linux drivers page for by Stefan Reinauer · 15 years ago
  20. 12aba82 Refactor copy_and_run so that it uses a single code base instead of by Patrick Georgi · 15 years ago
  21. b8a939e dd the family10h Rev C0-C2 support to coreboot. by Vincent Lim vincent.lim · 15 years ago
  22. 9322578 Create a valid stack pointer after leaving CAR, so function calls don't by Patrick Georgi · 15 years ago
  23. bc9de2f Revert 4099 patch that causes an ECC error. Memory has to be written while ECC by Myles Watson · 15 years ago
  24. 554fce6 makes the smi handler a little bit less verbose by Stefan Reinauer · 15 years ago
  25. 38c49fd argh... never redo parts of the original patch on the fly. This fixes the tree by Stefan Reinauer · 15 years ago
  26. 953253f This patch unifies the socket_mPGA604_800Mhz and socket_mPGA604_533Mhz to a by Stefan Reinauer · 15 years ago
  27. 6af0cb6 Trivial removal of a freudian slip. by Patrick Georgi · 15 years ago
  28. aeba92a Add VIA CX700 support, plus VIA vt8454c reference board support. by Stefan Reinauer · 15 years ago
  29. 8214457 r4097 broke the tree and it remains unfixed :-( by Stefan Reinauer · 15 years ago
  30. 15bf50d Following patch adds resume (exit from self refresh) support for AMD K8 revF by Rudolf Marek · 15 years ago
  31. a572f83 Following patch adds necessary hooks and as well the compile time checks for by Rudolf Marek · 15 years ago
  32. edf4807 drop unused variables in generic smm handler. (trivial) by Stefan Reinauer · 15 years ago
  33. 2fd2c79 drop another shadow variable (trivial) by Stefan Reinauer · 15 years ago
  34. 5cbdc1e Fix typo. trivial. by Marc Jones · 15 years ago
  35. 4ca5902 Updated microcode for for AMD Fam10 DR-B2 and B3. by Zheng Bao · 15 years ago
  36. 3081bdf Drop CONFIG_CHIP_NAME. Those config statements in Config.lb should by Stefan Reinauer · 15 years ago
  37. ac36906 fix typo by Stefan Reinauer · 15 years ago
  38. 951c63f The latest ucode patches for Family 10h: by Zeng Bao · 15 years ago
  39. c675955 fix totalimpact briq compilation. the target had a cpu specific and a mainboard by Stefan Reinauer · 15 years ago
  40. 45cc550 Some updates for core/core duo/core2/core2 duo cpus. by Stefan Reinauer · 15 years ago
  41. 3b38745 * fix a minor power state issue in the ich7 smm handler by Stefan Reinauer · 15 years ago
  42. 8dcd50b fix a bunch of cast and type warnings and don't call the apic "nvram", that by Stefan Reinauer · 15 years ago
  43. 51001fbd I just went on a bugfix frenzy and fixed all printk format warnings by Carl-Daniel Hailfinger · 15 years ago
  44. 2b34db8 coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3 by Stefan Reinauer · 15 years ago
  45. 21c8b5a With this patch the v2 build system will create a directory hierarchy by Stefan Reinauer · 15 years ago
  46. 678d614 This patch makes several CMOS/NVRAM reads dependent on whether there's a table to read. Otherwise you never know what you'll get from the factory BIOS. There are probably more, but these are the ones compiled into the s2895. by Myles Watson · 15 years ago
  47. 08afc6d Unify CAR so the same compiled code does the right thing on both by Patrick Georgi · 15 years ago
  48. 537bd5f Bellongs to r3946 by Rudolf Marek · 15 years ago
  49. f997b55 Following patch adds dynamically generated P-States infrastructure as well as by Rudolf Marek · 15 years ago
  50. 552b327 This patch converts __FUNCTION__ to __func__, since __func__ is standard. by Myles Watson · 15 years ago
  51. 7f86ed1 Fix mtrr setup for UMA architectures. by Stefan Reinauer · 15 years ago
  52. 7dde1da Print a loud warning message if we run out of MTRRs. by Carl-Daniel Hailfinger · 15 years ago
  53. c4ddbff Remove some warnings, mainly from format strings which didn't match the by Myles Watson · 15 years ago
  54. 742655b Following patch adds missing CPU names. Please check by Rudolf Marek · 15 years ago
  55. 20b261d Fix register typo for core 2 cpus (trivial) by Stefan Reinauer · 15 years ago
  56. c598330 fix compiler warnings (trivial) by Stefan Reinauer · 15 years ago
  57. 269563a First shot at factoring SMM code into generic parts and southbridge specific by Stefan Reinauer · 15 years ago
  58. e562f72 Fix a LOT of implicit function declarations before they become errors. by Corey Osgood · 16 years ago
  59. 43bb9cd This patch gets rid of all the implicit definition warnings for serengeti except get_nodes. by Myles Watson · 16 years ago
  60. 845a2eba Add another CPUID to the Via C7's table, the one on my Jetway J7F2. by Corey Osgood · 16 years ago
  61. a04b107 Add another AM2 cpuid to the name string. Also, colapse the cases for duplicate strings to save some space. by Marc Jones · 16 years ago
  62. c87ddd9 Update K8 FID/VID setup. Add support for 100MHz FIDs (revG). by Marc Jones · 16 years ago
  63. 00a889c Support for Intel Core Duo and Core 2 Duo (tm) CPUs. by Stefan Reinauer · 16 years ago
  64. 5e5bef5 Speed up copying coreboot to ram by using "movsl" instead of "movsb". by Jens Rottmann · 16 years ago
  65. 92f3eda Thanks to Jason Zhao we got a skeleton CAR code for VIA C7. I have tried by Carl-Daniel Hailfinger · 16 years ago
  66. 2ee6779 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of by Carl-Daniel Hailfinger · 16 years ago
  67. 8d183c5 Add AMD K8 S1G1 socket support. by Michael Xie Michael.Xie · 16 years ago
  68. 1996313 This patch implements support for the CPU core of the Intel EP80579 by Ed Swierk · 16 years ago
  69. 8e65adb Fix outb to 0x80 delay functions to use inb instead (fixes excessive post codes by Stefan Reinauer · 16 years ago
  70. a2c951e Clean up whitespace and comments style. (trivial) by Marc Jones · 16 years ago
  71. 87c938f adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot" by Stefan Reinauer · 16 years ago
  72. 6852406 Go back to SIPI WAIT state for those CPUS defining the newly introduced by Stefan Reinauer · 16 years ago
  73. a56edac This patch by Stefan Reinauer · 16 years ago
  74. 5a522d4 match against all steppings of a CPU model, because these are _model_ drivers. by Stefan Reinauer · 16 years ago
  75. 57d2af8 same spelling in all mtrr output.. (trivial) by Stefan Reinauer · 16 years ago
  76. df6c858 drop unused code (trivial) by Stefan Reinauer · 16 years ago
  77. 35b5361 Add AMD Fam10 B3 default settings to match AMD example code. by Marc Jones · 16 years ago
  78. 51737cf Update to the latest AMD Fam10 microcode patches. by Marc Jones · 16 years ago
  79. 2df2915 Add Fam10 Gart table walk enable for MCA reporting to match AMD example code. by Marc Jones · 16 years ago
  80. 049814c Add missing Intel CPU (trivial). by Uwe Hermann · 16 years ago
  81. 65e0804 Remove inline from FAM10 CPU initialization functions. by Marc Jones · 16 years ago
  82. c1cbff2 Add CPUID processor name string support for Fam10 CPUs. by Marc Jones · 16 years ago
  83. 403b89a On APs the ClLinesToNbDis was being left enabled from CAR setup. by Marc Jones · 16 years ago
  84. a74a8ff Clean up and remove late initialization code that is no longer needed. by Marc Jones · 16 years ago
  85. f0174b5 Find matching settings for each CPUs FID, VID, and P-state registers and initialize them. by Marc Jones · 16 years ago
  86. 8127dc4 Update the FAM10 microcode to current versions. by Marc Jones · 16 years ago
  87. c74e362 Missed this file in the previous check-in, r3248. by Marc Jones · 16 years ago
  88. da4ce6b Add early MSR and PCI register initialization. by Marc Jones · 16 years ago
  89. 78f59f8 Re-add files I deleted by mistake in r3219. They are meant for a different by Marc Jones (marc.jones · 16 years ago
  90. df22f78 Don't check exclusive IRQ fieldin the PIR table. by Marc Jones(marc.jones · 16 years ago
  91. 4afb7fb Add a workaround for a bug in some binutils version which strictly by Carl-Daniel Hailfinger · 16 years ago
  92. cfcc9ca * split model_centaur into model_c3 and model_c7 by Stefan Reinauer · 16 years ago
  93. 3182122 Update AMD CPU list based on Revision Guide for AMD NPT Family 0Fh Processors, by Uwe Hermann · 16 years ago
  94. b681570 Formatting fixes, no content changes (trivial). by Uwe Hermann · 16 years ago
  95. b8c2aa2 by Myles Watson · 16 years ago
  96. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 16 years ago
  97. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 16 years ago
  98. aeea7c1 Via C3 datasheets don't make any mention of microcode updates, and the by Corey Osgood · 16 years ago
  99. ed8dc58 Add a workaround for a bug in some binutils version which strictly by Carl-Daniel Hailfinger · 16 years ago
  100. 1923fc4 This patch introduces 4k CAR size granularity for the AMD x86 CAR code. by Carl-Daniel Hailfinger · 16 years ago