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coreboot
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b6df6b065cffea9b93f6fdbd041ee15e4ec6fd61
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src
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soc
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intel
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tigerlake
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acpi.c
b6df6b0
soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper
by Subrata Banik
· 4 years, 8 months ago
48c7870
soc/intel/{icl,cnl,tgl}: Always add PM1_TMR block to FADT
by Meera Ravindranath
· 4 years, 8 months ago
91e89c5
soc/intel/tigerlake: Do initial SoC commit till ramstage
by Subrata Banik
· 4 years, 10 months ago