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review.coreboot.org / coreboot / b3a8cc54dbaf833c590a56f912209a5632b71f49 / src / soc / intel / skylake / romstage / romstage_fsp20.c
  1. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  2. 993f68a soc/intel: Add mem_rank info in SMBIOS by Francois Toguo · 6 years ago
  3. 6275e34 soc/intel/skylake: Use real common code for VMX init by Nico Huber · 6 years ago
  4. 0ce41f1 src: Add required space after "switch" by Elyes HAOUAS · 6 years ago
  5. 28114ae SMBIOS: Remove duplicated smbios_memory_type enum by Elyes HAOUAS · 6 years ago
  6. d44221f Move compiler.h to commonlib by Nico Huber · 6 years ago
  7. ef250c4 soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetree by Shaunak Saha · 6 years ago
  8. 6ea6775 soc/{amd,intel}: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  9. 9593e97 soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) by Nico Huber · 6 years ago
  10. 6403167 compiler.h: add __weak macro by Aaron Durbin · 6 years ago
  11. 2afe4dc soc/intel/skylake: Enable VT-d and X2APIC by Nico Huber · 7 years ago
  12. 54fa28e soc/intel/skylake: Clean up SMBIOS Table Type 17 creation by Subrata Banik · 7 years ago
  13. f7f01f7 soc/intel/skylake: Send correct ddr_type to SMBIOS Table by Barnali Sarkar · 7 years ago
  14. fea2429 security/vboot: Move vboot2 to security kconfig section by Philipp Deppenwiese · 7 years ago
  15. d347680 soc/intel/skylake: Add support in SKL for PMC common code by Shaunak Saha · 7 years ago
  16. bd55c02 vendor/intel/skykabylake: Update FSP header files to version 2.7.2 by Balaji Manigandan B · 7 years ago
  17. e0b5795 soc/intel/skylake: Configure FSP to skip ME MBP step by Duncan Laurie · 7 years ago
  18. 9dc62ea soc/intel/skylake: Fix broken memory info HOB scanning by Nico Huber · 7 years ago
  19. ff48b3b soc/intel/skylake: Enable SMBus based on mainboard config by Naresh G Solanki · 7 years ago
  20. 4dc9fb0 soc/intel/skylake: reduce postcar stack usage for fsp 2.0 by Aaron Durbin · 7 years ago
  21. 3214bc4 soc/intel/skylake: Remove “disable SaGv” in recovery mode flow by Subrata Banik · 7 years ago
  22. 79f0741 soc/intel/skylake: use postcar stage for fsp 2.0 by Aaron Durbin · 7 years ago
  23. 6375512 soc/intel/skylake: Add configs for enabling DCI and TraceHub by Aamir Bohra · 8 years ago
  24. b7fa7fb soc/intel/skylake: Extract DIMM Information from FSP MEM INFO HOB by Barnali Sarkar · 8 years ago
  25. e65affa soc/intel/skylake: add PrmrrSize to chip config by Robbie Zhang · 8 years ago
  26. ffc934d intel MMA: Enable MMA with FSP2.0 by Pratik Prajapati · 8 years ago
  27. 847da79 soc/intel/skylake: Remove redundant BootLoaderTolumSize assignment by Subrata Banik · 8 years ago
  28. 79239b7 soc/intel/skylake: Pass proper CPU flex ratio override to FSP by Naresh G Solanki · 8 years ago
  29. f796c6e driver/intel/fsp2_0: Add version parameter to FSP platform callback by Andrey Petrov · 8 years ago
  30. 5bf42c6 soc/intel/skylake: Add FSP 2.0 support in romstage by Barnali Sarkar · 8 years ago
  31. 1222a73 skylake: Add initial FSP2.0 support by Rizwan Qureshi · 8 years ago