Gitiles
Code Review Sign In
review.coreboot.org / coreboot / b3a8cc54dbaf833c590a56f912209a5632b71f49 / src / soc / intel / skylake / bootblock / pch.c
  1. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  2. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  3. 7bc4dc5 soc/intel/common/block: Move tco common functions into block/smbus by Subrata Banik · 6 years ago
  4. 3d45000 src: Fix typo by Elyes HAOUAS · 6 years ago
  5. 7837c20 soc/intel/common/block: Move p2sb common functions into block/p2sb by Subrata Banik · 6 years ago
  6. 68c851b src: Get rid of device_t by Elyes HAOUAS · 6 years ago
  7. efbfdd2 soc/intel/skylake: Move PCR DMI programming into bootblock by Subrata Banik · 6 years ago
  8. bffff54 soc/intel/skylake: Make use of common CSE code for skylake by Subrata Banik · 7 years ago
  9. d347680 soc/intel/skylake: Add support in SKL for PMC common code by Shaunak Saha · 7 years ago
  10. 1483d1f soc/intel/skylake: Enable common LPC IP by Ravi Sarawadi · 7 years ago
  11. 9413cb5 soc/intel/skylake: Fix PMC address range setup for PCH-H by Nico Huber · 7 years ago
  12. c587b97 soc/intel/skylake: Set generic I/O decode ranges early by Nico Huber · 7 years ago
  13. 502131a soc/intel/skylake: Use intel/common/block/smbus code by Aamir Bohra · 7 years ago
  14. 7146445 soc/intel/skylake: Clean up code by using common FAST_SPI module by Barnali Sarkar · 7 years ago
  15. 43c3109 soc/intel/skylake: Use ITSS common code by Bora Guvendik · 7 years ago
  16. e0268d3 soc/intel/skylake: Use RTC common code by Subrata Banik · 7 years ago
  17. e7ceae7 soc/intel/skylake: Use common PCR module by Subrata Banik · 7 years ago
  18. 2ee54db soc/pci_devs.h: Use consistent naming in soc/pci_devs.h by Subrata Banik · 7 years ago
  19. f4c4ab9 soc/intel/skylake: Fix remaining issues detected by checkpatch by Lee Leahy · 7 years ago
  20. b439a92 soc/intel/skylake: Wrap lines at 80 columns by Lee Leahy · 7 years ago
  21. 544dac6 soc/skylake: Move IO decode range out from pch_lpc_init by Teo Boon Tiong · 8 years ago
  22. f0ba225 skylake: Prepare GPE for use in bootblock by Duncan Laurie · 8 years ago
  23. 29f8708 soc/intel/skylake: Enable HECI BAR for ME communication by Subrata Banik · 8 years ago
  24. ecd9a94 soc/intel/skylake: Move bootblock specific code from skylake/romstage by Naresh G Solanki · 8 years ago
  25. cf73c13 skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init by Rizwan Qureshi · 8 years ago
  26. e4a8537 soc/intel/skylake: Add C entry bootblock support by Subrata Banik · 8 years ago
  27. 50c3ba2 intel/skylake: unconditionally set SPI controller BAR by Aaron Durbin · 9 years ago
  28. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  29. 1d14b3e soc/intel: Add Skylake SOC support by Lee Leahy · 9 years ago
  30. b000513 soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC by Lee Leahy · 9 years ago