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review.coreboot.org / coreboot / b3267e002e798e90ca09b11e42ea8949dccde2e7 / src / northbridge / intel / nehalem / memmap.c
  1. fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago[Renamed from src/northbridge/intel/nehalem/ram_calc.c]
  2. f6c2068 intel/nehalem,sandybridge: Move stage_cache support function by Kyösti Mälkki · 5 years ago
  3. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  4. 23fbd05 nb/intel/nehalem: Call smm_region_start() function by Arthur Heymans · 5 years ago
  5. 97c7c6b cpu/intel/model_2065x: Put stage cache in TSEG by Arthur Heymans · 6 years ago
  6. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  7. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  8. 5b2a2d0 src/*: normalize Google copyright headers by Patrick Georgi · 6 years ago
  9. 02b13fd cpu/intel/model_2065x: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  10. 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  11. 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
  12. 2c3fd49 intel/nehalem post-car: Use postcar_frame for MTRR setup by Kyösti Mälkki · 8 years ago
  13. a4ffe9d intel post-car: Separate files for setup_stack_and_mtrrs() by Kyösti Mälkki · 8 years ago
  14. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  15. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  16. f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  17. 191d221 intel/nehalem: Add get_top_top_ram() in ramstage by Kyösti Mälkki · 10 years ago