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review.coreboot.org / coreboot / b0c94a1866debb262ff1343674de871f6b770f3f / src
  1. 4a038ca Place the W83627EHG MIDI base address mask in the correct position. by Alexandru Gagniuc · 14 years ago
  2. b1d1c4d Reliably build arbitrary Kconfig-based revisions of SeaBIOS by Peter Stuge · 14 years ago
  3. 1440d08 Actually add PC87382 into Kconfig, missing from r6332 by Peter Stuge · 14 years ago
  4. 82e3617 Add PC87392 support by Sven Schnelle · 14 years ago
  5. 92cf08c Add PC87382 support by Sven Schnelle · 14 years ago
  6. a96b218 Fix subvendor/subdevice programming on RS690 by Josef Kellermann · 14 years ago
  7. 87fcffa Wrap CONFIG_MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_ID in weak functions by Patrick Georgi · 14 years ago
  8. 539500e pmh7.[ch]: Add missing license headers. by Uwe Hermann · 14 years ago
  9. 6f92d21 Properly add Lenovo EC to build by Sven Schnelle · 14 years ago
  10. 4a6c9d1 Add support for the Lenovo PMH7 embedded controller by Sven Schnelle · 14 years ago
  11. aeead27 Fix an infinite loop in pnp_get_ioresource(), which freezes coreboot if by Stefan Reinauer · 14 years ago
  12. 38b1f3b Add PCI ID's for VIA K8T800 and K8M800 northbridges. by Alexandru Gagniuc · 14 years ago
  13. b82673b Build failure because of src/pc80/mc146818rtc_early.c unused variable by Stefan Reinauer · 14 years ago
  14. ff9d78c Replace special rules for auxiliary files by cbfs-files-y entries by Patrick Georgi · 14 years ago
  15. 5c0bca2 Inverse two arguments of cbfs-files-y and adapts its users (one of which already used the new order) by Patrick Georgi · 14 years ago
  16. e3509fd Pass all required toolchain parts to SeaBIOS correctly by Stefan Reinauer · 14 years ago
  17. 86bd99a by Rudolf Marek · 14 years ago
  18. 16ce01b This patch gets usbdebug console working in romstage. by Stefan Reinauer · 14 years ago
  19. 582d369 rename CONFIG_SERIAL_POST to CONFIG_CONSOLE_POST because that is what it does. by Stefan Reinauer · 14 years ago
  20. 1c2734f Fix Bimini build by Stefan Reinauer · 14 years ago
  21. 2c439c3 rk886ex lacked EC_ACPI by Stefan Reinauer · 14 years ago
  22. f13d7f1 Only add EC code if EC is selected in Kconfig by Stefan Reinauer · 14 years ago
  23. 7592e8b Add new ec subdir for Embedded Controllers and common ACPI EC support by Sven Schnelle · 14 years ago
  24. 4096fc5 SMM code on i945 platforms needs udelay() by Peter Stuge · 14 years ago
  25. a470019 Add a new CMOS variable which triggers activation of the by Patrick Georgi · 14 years ago
  26. a5c949e Trivial. Re-indent the code. by Zheng Bao · 14 years ago
  27. 066cbe0 Set the phy via weak function. As Rudolf called. by Zheng Bao · 14 years ago
  28. ce95265 oops. this is weird. CAR addresses should be specified in the socket and not in by Stefan Reinauer · 14 years ago
  29. 9dcca3b Set the SB800 SATA PHY correctly. by Zheng Bao · 14 years ago
  30. 679d38b This patch fixes an 'write_tables: coreboot table didn't fit (f0221)' issue. by Josef Kellermann · 14 years ago
  31. a302b58 Change fadt revision back to 3. by Zheng Bao · 14 years ago
  32. a3eb534 ... And fix the other compile time issues in cmos_layout.bin support by Patrick Georgi · 14 years ago
  33. f0bf4b5 Make YABEL warnings-are-errors safe by Patrick Georgi · 14 years ago
  34. 5ccbbd9 Typo. s,CMOS_COMPONENT,CBFS_COMPONENT,. by Patrick Georgi · 14 years ago
  35. 72cc87f Now bimini can boot linux to login. by Zheng Bao · 14 years ago
  36. ba18572 push ts5300 rom size to 1MB. In fact the flash part on that by Stefan Reinauer · 14 years ago
  37. 8ae82e3 Remove the code for debugging. by Zheng Bao · 14 years ago
  38. a4da254 S3 feanture of SB800. Compiliant with SB700. by Zheng Bao · 14 years ago
  39. 79c04d5 Move some board specific functions to sb800.h. by Zheng Bao · 14 years ago
  40. 8210e89 Features of Bimini board: RS785 SB800 by Zheng Bao · 14 years ago
  41. d098575 This sb800 code is derived from sb700. by Zheng Bao · 14 years ago
  42. dd676dd For Cx, each ChipSel need to be sent MR command. by Zheng Bao · 14 years ago
  43. c29675f Add a GX2 Kconfig option to choose the framebuffer size. by Nils Jacobs · 14 years ago
  44. 7b0500c Revert r5902 to make code more readable again. At least three people like to by Stefan Reinauer · 14 years ago
  45. 5bb9fd6 Now that the VIA code is run above 1Meg (like other boards), it should by Kevin O'Connor · 14 years ago
  46. 4adc9eb The cn700.c code references mainboard_interrupt_handlers() which isn't by Kevin O'Connor · 14 years ago
  47. cef3b89 Report if cmos_layout.bin can't be found when it should. by Patrick Georgi · 14 years ago
  48. 2447937 Move option table (cmos.layout's binary representation) by Patrick Georgi · 14 years ago
  49. a19c622 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  50. 752ab0d remove the code which is not ready to release. by Zheng Bao · 14 years ago
  51. 078efb5 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  52. 1021901 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  53. a7296e7 The code is tested on my board with register DIMMs. More tests need to be by Zheng Bao · 14 years ago
  54. a112523 Ooops lets see if this extra comment removal fixes this. by Rudolf Marek · 14 years ago
  55. aa55f37 Trivial, cleanup of GPIO comments. by Rudolf Marek · 14 years ago
  56. c3dc8f8 Disable CMOS recovery code for ROMCC boards as the CBFS code used for by Patrick Georgi · 14 years ago
  57. ef32965 Improved GPIO setup for roda/rk886ex, and some documentation by Patrick Georgi · 14 years ago
  58. a865b17 Allow coreboot to initialize CMOS if checksum is invalid. by Patrick Georgi · 14 years ago
  59. 4c8e269 Default to CRT on Kontron/986lcd-m. "default display" doesn't always by Patrick Georgi · 14 years ago
  60. 9144304 Improve compatibility of YABEL with real-world VGABIOSes by Patrick Georgi · 14 years ago
  61. fb433be drop unused files by Stefan Reinauer · 14 years ago
  62. 09e0e9a change a readable way to fix SB800 CIMX "multi-character constant warning". by Kerry She · 14 years ago
  63. 965c43b Various Nokia IP530 fixes. by Marc Bertens · 14 years ago
  64. 69436e1 Fix some settings fo AMD MCT. It is based on BIOS test suite. by Zheng Bao · 14 years ago
  65. da712f3 uart_init is only used in romstage. by Stefan Reinauer · 14 years ago
  66. 1b34226 move single options out of main menu and remove stray "options" by Stefan Reinauer · 14 years ago
  67. c7f0c8f MCP55: Cosmetic fixes, switch to u8 et al. by Uwe Hermann · 14 years ago
  68. 7e2fbd5 CK804: Cosmetic fixes, switch to u8 et al. by Uwe Hermann · 14 years ago
  69. ecab12a Trivial: by Kerry She · 14 years ago
  70. 7917f43 Trivial: use the IO_APIC_ADDR constant defined in ioapic.h, and spell check by Kerry She · 14 years ago
  71. e925965 src/southbridge/amd/cimx_wrapper: Run dos2unix on the files. by Uwe Hermann · 14 years ago
  72. d6a1373 AMD SB800: Drop component prefix from filenames. by Uwe Hermann · 14 years ago
  73. 48b8b92 AMD Bimini: Use mptable_init() in mptable.c. by Uwe Hermann · 14 years ago
  74. 26c1823 AMD Bimini: Small fixes, and updates to recent trunk conventions. by Uwe Hermann · 14 years ago
  75. f7e7519 AMD Bimini: Drop duplicate ASL files as we did for other boards. by Uwe Hermann · 14 years ago
  76. ee5fcac Add support for the AMD Bimini eval mainboard. by Kerry She · 14 years ago
  77. 84f59ae Add AMD SB800 southbridge support via cimx_wrapper. by Kerry She · 14 years ago
  78. 799fed9 Add AMD SB800 southbridge CIMx code. by Kerry She · 14 years ago
  79. 40992d3 Add RS785(RS880) support. Just few pci_ids. by Zheng Bao · 14 years ago
  80. 8098e42 Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code by Nils Jacobs · 14 years ago
  81. 8cf54c9 Use die() to assure the processor can't wake up from an interrupt. by Nils Jacobs · 14 years ago
  82. f1939bb Per default, use SeaBIOS payload instead of no payload. by Stefan Reinauer · 14 years ago
  83. 84be0f5 -Change the remaining GLIU1 port 5 register names from VIP (Video Input Port) by Nils Jacobs · 14 years ago
  84. cdcf983 fix i810 boards with ram init debugging disabled. by Stefan Reinauer · 14 years ago
  85. ef15ff4 -Clean up some comments. by Nils Jacobs · 14 years ago
  86. fc01e5e proper printk handling in src/northbridge/intel/i82810/raminit.c by Stefan Reinauer · 14 years ago
  87. 50e7233 __PRE_RAM__ is defined by the makefile by Stefan Reinauer · 14 years ago
  88. 1c2c750 dump_spd_registers() is only defined when ram init debugging is on. by Stefan Reinauer · 14 years ago
  89. 3c0bfaf Fix most CONFIG_DEBUG_RAM_SETUP issues. by Stefan Reinauer · 14 years ago
  90. acda2fc Intel SCH: make state machine binary selection available in Kconfig for now. by Stefan Reinauer · 14 years ago
  91. a35eb2c All the values should stay untouched or be set automatically by the resource by Stefan Reinauer · 14 years ago
  92. 2d1d9ceb Random fixes for TI pci1x2x / Nokia IP530 / others. by Uwe Hermann · 14 years ago
  93. 19d69e3 Move Geode GX2 UMA video memory size to Kconfig by Nils Jacobs · 14 years ago
  94. 642509c Remove dead and unused Geode GX2 code by Nils Jacobs · 14 years ago
  95. 3344743 Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names by Nils Jacobs · 14 years ago
  96. 1c6d4e6 Clean up Geode GX2 comments, whitespace and coding style. Trivial. by Nils Jacobs · 14 years ago
  97. 88929f9 Nokia IP530: Add missing "select SDRAMPWR_4DIMM". by Uwe Hermann · 14 years ago
  98. 09f5a74 Fix build with CONFIG_DEBUG_RAM_SETUP on Intel 440BX, use printk(). by Keith Hui · 14 years ago
  99. bccbbe6 The same mechanisms are used for normal and fallback images. by Stefan Reinauer · 14 years ago
  100. a05ddbc ASUS M2N-E: Enable PCI-E x16 slot. by Uwe Hermann · 14 years ago