Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
b009ac49c85161ea2746f8bdfc6ce28a8f46e8bc
/
src
/
northbridge
/
intel
/
sandybridge
/
raminit_common.c
b009ac4
nb/intel/sandybridge/raminit: Fix non ASCII char
by Patrick Rudolph
· 6 years ago
5ee9bc1
nb/intel/sandybridge/raminit: Set REFIx9 according to spec
by Patrick Rudolph
· 7 years ago
f369e60
northbridge/intel: Remove unneeded includes
by Elyes HAOUAS
· 6 years ago
dabebc3
nb/intel/sandybridge: support more XMP timings
by Dan Elkouby
· 6 years ago
adda3f81
nb/intel/sandybridge: Add required space before opening parenthesis '('
by Elyes HAOUAS
· 7 years ago
6af8aab
nb/intel/sandybridge/raminit: Fix setting scramble seed for CH1
by Arthur Heymans
· 7 years ago
ac4f216
nb/intel/sandybridge: Refactor dram_dimm_mapping()
by Nico Huber
· 7 years ago
b794a69
nb/intel/sandybridge/raminit: Add Kconfig option for fuses
by Patrick Rudolph
· 7 years ago
58d16af
nb/intel/sandybridge/raminit: Fix dual DIMM command rate
by Patrick Rudolph
· 7 years ago
abc504f
nb/intel/sandybridge: Use macros to determine min and max of timA
by Arthur Heymans
· 7 years ago
19c3dad
nb/intel/sandybridge/raminit: Fix odt stretch
by Patrick Rudolph
· 8 years ago
368b615
nb/intel/sandybridge/raminit: Reduce log level
by Patrick Rudolph
· 8 years ago
3c8cb97
nb/intel/sandybridge/raminit: Fix normalize_training
by Patrick Rudolph
· 8 years ago
413edc8
nb/intel/sandybridge/raminit: Add debugging output
by Patrick Rudolph
· 8 years ago
d45114f
intel PCI ops: Remove explicit PCI MMCONF access
by Kyösti Mälkki
· 11 years ago
fd5fa2a
nb/intel/sandybridge/raminit: Split raminit.c
by Patrick Rudolph
· 8 years ago