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review.coreboot.org / coreboot / ae593879f5a589df7c88d0bbce966657891e93c5 / src / northbridge / intel / gm45 / romstage.c
  1. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  2. be9533a nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support by Arthur Heymans · 4 years, 10 months ago
  3. 9ed0df4 sb/intel/i82801ix: Add common code to set up LPC IO decode ranges by Arthur Heymans · 4 years, 10 months ago
  4. cd7a70f soc/intel: Use common romstage code by Kyösti Mälkki · 5 years ago
  5. 157b189 cpu/intel: Enter romstage without BIST by Kyösti Mälkki · 5 years ago
  6. 274dabd src/northbridge: Remove unneeded include <arch/io.h> by Elyes HAOUAS · 5 years ago
  7. ad0b482 sb/intel/i82801ix: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB by Patrick Rudolph · 5 years ago
  8. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  9. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  10. 3b0eb60 nb/intel/gm45: Use a common romstage by Arthur Heymans · 6 years ago